[S] Change in coreboot[master]: soc/intel/common/acpi: provide PTS/WAK hooks for ECs

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68788 )

(

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/common/acpi: provide PTS/WAK hooks for ECs
......................................................................

soc/intel/common/acpi: provide PTS/WAK hooks for ECs

Provide PTS/WAK hooks for ECs like we do for mainboards.

Change-Id: I687254362a896baa590959bd01ae49579ec12c94
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68788
Reviewed-by: Angel Pons 
Reviewed-by: Eric Lai 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/acpi/platform.asl
1 file changed, 26 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Eric Lai: Looks good to me, approved

diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index c988e0a..6a19792 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -6,6 +6,8 @@
 External(_SB.MWAK, MethodObj)
 External(_SB.PCI0.EGPM, MethodObj)
 External(_SB.PCI0.RGPM, MethodObj)
+External(_SB.PCI0.LPCB.EC0.PTS, MethodObj)
+External(_SB.PCI0.LPCB.EC0.WAK, MethodObj)

#include <arch/x86/acpi/post.asl>

@@ -18,6 +20,10 @@
 {
    DBG0 = POST_OS_ENTER_PTS

+	If (CondRefOf (_SB.PCI0.LPCB.EC0.PTS))
+	{
+		_SB.PCI0.LPCB.EC0.PTS (Arg0)
+	}
    If (CondRefOf (_SB.MPTS))
    {
    	_SB.MPTS (Arg0)
@@ -38,6 +44,10 @@
 {
    DBG0 = POST_OS_ENTER_WAKE

+	If (CondRefOf (_SB.PCI0.LPCB.EC0.WAK))
+	{
+		_SB.PCI0.LPCB.EC0.WAK (Arg0)
+	}
    If (CondRefOf (_SB.MWAK))
    {
    	_SB.MWAK (Arg0)