Change in coreboot[master]: soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE - coreboot-gerrit

18 Aug 2019


      Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29910 )
Change subject: soc/intel/fsp_baytrail: Select RELOCATABLE_RAMSTAGE
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Patch Set 3:
Tested on minnowboard turbot.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I206f879f1d944c0a5e4e62ac4d2328889bc2b4ce
Gerrit-Change-Number: 29910
Gerrit-PatchSet: 3
Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Huang Jin huang.jin@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Philipp Deppenwiese zaolin.daisuki@gmail.com
Gerrit-Reviewer: York Yang yyang024@gmail.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Sun, 18 Aug 2019 15:28:30 +0000
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