Julien Viard de Galbert has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25436 )
Change subject: mb/scaleway/tagada: GPIO on M.2 PCIe/SATA configure FSP HSIO lanes
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Patch Set 20:
(1 comment)
Updated, thanks to new commit hook and rules !
https://review.coreboot.org/c/coreboot/+/25436/18/src/mainboard/scaleway/tag...
File src/mainboard/scaleway/tagada/hsio.c:
https://review.coreboot.org/c/coreboot/+/25436/18/src/mainboard/scaleway/tag...
PS18, Line 23: BL_HSIO_INFORMATION *config)
Many of these fit in one line
I think clang-format in the commit hook fixed it for me ;)
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