[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add limited to 32-bits FSP 2.4 support

[Jérémy Compostella (Code Review)]

Attention is currently required from: Andrey Petrov, Bora Guvendik, Chen, Gang C, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Karthik Ramasubramanian, Martin L Roth, Nick Vaccaro, Ronak Kanabar, Shuo Liu, Subrata Banik, Tarun, Wonkyu Kim.

Hello Andrey Petrov, Bora Guvendik, Chen, Gang C, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Karthik Ramasubramanian, Martin L Roth, Nick Vaccaro, Ronak Kanabar, Shuo Liu, Subrata Banik, Tarun, Wonkyu Kim, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/80275?usp=email

to look at the new patch set (#24).

The following approvals got outdated and were removed:
Code-Review+1 by Subrata Banik, Verified+1 by build bot (Jenkins)

Change subject: drivers/intel/fsp2_0: Add limited to 32-bits FSP 2.4 support
......................................................................

drivers/intel/fsp2_0: Add limited to 32-bits FSP 2.4 support

Intel Firmware Support Package 2.4 specification (document 736809)
brings some significant changes compared to version 2.3 (document
644852):

1. It supports FSP-M multi-phase init. Some fields have been added to
   the FSP header data structure for this purpose.

2. The `FSPM_ARCH2_UPD' and `FSPS_ARCH2_UPD' data structures must be
   used in place of `FSPM_ARCH_UPD' and `FSPS_ARCH_UPD' respectively.

3. It support 64-bits FSP but 64-bits support will be provided by
   subsequent patch.

Note that similarly to what is done for silicon initialization,
timestamps and post-codes are used during the memory initialization
multi-phase.

[736809]
https://cdrdv2-public.intel.com/736809/736809_FSP_EAS_v2.4_Errata_A.pdf

[644852]
https://cdrdv2-public.intel.com/644852/644852_2.3_Firmware-Support-Package-E...

TEST=verified on Lunar Lake RVP board (lnlrvp)

Change-Id: I1c24d26e105c3dcbd9cca0e7197ab1362344aa97
Signed-off-by: Jeremy Compostella 
---
M src/commonlib/include/commonlib/console/post_codes.h
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/upd_display.c
M util/cbfstool/eventlog.c
10 files changed, 124 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/80275/24