Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Paul Menzel, Mario Scheithauer, Angel Pons, Subrata Banik, Michael Niewöhner, Lean Sheng Tan, Patrick Rudolph, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 )
Change subject: soc/intel/elkhartlake: Introduce Intel PSE ......................................................................
Patch Set 50:
(8 comments)
File src/soc/intel/elkhartlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/aed6f249_a207b15e PS50, Line 386: FSP_ARRAY_LOAD(params->PchPseDmaSbInterruptEnable, config->PseDmaSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/b21d22bf_257cc54a PS50, Line 388: FSP_ARRAY_LOAD(params->PchPseUartSbInterruptEnable, config->PseUartSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/140814ed_83586221 PS50, Line 391: FSP_ARRAY_LOAD(params->PchPseQepSbInterruptEnable, config->PseQepSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/6d361a33_f5ee5935 PS50, Line 393: FSP_ARRAY_LOAD(params->PchPseI2cSbInterruptEnable, config->PseI2cSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/b59f46b5_d3aaffd2 PS50, Line 395: FSP_ARRAY_LOAD(params->PchPseI2sSbInterruptEnable, config->PseI2sSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/6c2e7293_4c01e5d8 PS50, Line 397: FSP_ARRAY_LOAD(params->PchPseSpiSbInterruptEnable, config->PseSpiSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/7c0c1f93_6104d5b9 PS50, Line 401: FSP_ARRAY_LOAD(params->PchPseCanSbInterruptEnable, config->PseCanSbIntEn); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132588): https://review.coreboot.org/c/coreboot/+/55367/comment/247c0d17_498ab6cf PS50, Line 428: else { else should follow close brace '}'
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build bot (Jenkins) (Code Review)