Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44334 )
Change subject: sb/intel/i82801ix/lpc.c: Align with i82801jx ......................................................................
sb/intel/i82801ix/lpc.c: Align with i82801jx
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: I9445fac7db0a96b6a28ccf307f5ccedc1f94b8ab Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/i82801ix/lpc.c 1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/44334/1
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 6fe9bb9..ad7141a 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -97,7 +97,7 @@ */
for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin=0, int_line=0; + u8 int_pin = 0, int_line = 0;
if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) continue; @@ -160,8 +160,7 @@ int nmi_option;
/* BIOS must program... */ - reg32 = pci_read_config32(dev, 0xac); - pci_write_config32(dev, 0xac, reg32 | (1 << 30) | (3 << 8)); + pci_or_config32(dev, 0xac, (1 << 30) | (3 << 8));
/* Which state do we want to goto after g3 (power restored)? * 0 == S0 Full On @@ -477,7 +476,6 @@ } }
- static const char *lpc_acpi_name(const struct device *dev) { return "LPCB";
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44334 )
Change subject: sb/intel/i82801ix/lpc.c: Align with i82801jx ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44334 )
Change subject: sb/intel/i82801ix/lpc.c: Align with i82801jx ......................................................................
sb/intel/i82801ix/lpc.c: Align with i82801jx
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: I9445fac7db0a96b6a28ccf307f5ccedc1f94b8ab Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44334 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/i82801ix/lpc.c 1 file changed, 2 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 6fe9bb9..ad7141a 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -97,7 +97,7 @@ */
for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin=0, int_line=0; + u8 int_pin = 0, int_line = 0;
if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) continue; @@ -160,8 +160,7 @@ int nmi_option;
/* BIOS must program... */ - reg32 = pci_read_config32(dev, 0xac); - pci_write_config32(dev, 0xac, reg32 | (1 << 30) | (3 << 8)); + pci_or_config32(dev, 0xac, (1 << 30) | (3 << 8));
/* Which state do we want to goto after g3 (power restored)? * 0 == S0 Full On @@ -477,7 +476,6 @@ } }
- static const char *lpc_acpi_name(const struct device *dev) { return "LPCB";
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)