Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 )
Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE ......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/mt8186/include/soc/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/60529/comment/5a051899_07182518 PS5, Line 28: STACK(0x0010B000, 7K) : TPM_TCPA_LOG(0x0010CC00, 2K) : FMAP_CACHE(0x0010D400, 2K) : WATCHDOG_TOMBSTONE(0x0010DC00, 4) : CBFS_MCACHE(0x0010DC04, 8K - 4) : TIMESTAMP(0x0010FC00, 1K) I think we want to prevent unaligned regions.
Can we re-order to
VB2_WORK (12k) TTB (28k) - 40 DMA_COHERENT (4k) - 44k TPM_TCPA_LOG (2k) - 46k FMAP_CACHE (4k) - 48k WATCHDOG_TOMBSTONE (4) CBFS_MCACHE (8k-4) 56k STACK (7k) - 63k TIMESTAMP (1k) - 64k