Change in coreboot[master]: security/intel: Hide Intel submenu when INTEL_TXT is disabled
Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36852 )
Change subject: security/intel: Hide Intel submenu when INTEL_TXT is disabled ......................................................................
security/intel: Hide Intel submenu when INTEL_TXT is disabled
An empty submenu Intel is displayed in security menu when INTEL_TXT is disabled. Enable submenu Intel only when INTEL_TXT is enabled.
BUG=N/A TEST=build
Change-Id: Iff1d84ff60a15259b60c6205a63a27ecb26346a3 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/security/intel/Kconfig M src/security/intel/txt/Kconfig 2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/36852/1
diff --git a/src/security/intel/Kconfig b/src/security/intel/Kconfig index 333e385..a4525e7 100644 --- a/src/security/intel/Kconfig +++ b/src/security/intel/Kconfig @@ -13,8 +13,4 @@ ## GNU General Public License for more details. ##
-menu "Intel" - source "src/security/intel/txt/Kconfig" - -endmenu # Intel diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig index 011a41c..97d24fd 100644 --- a/src/security/intel/txt/Kconfig +++ b/src/security/intel/txt/Kconfig @@ -26,6 +26,8 @@
if INTEL_TXT
+menu "Intel" + config INTEL_TXT_BIOSACM_FILE string "BIOS ACM file" default "3rdparty/blobs/soc/intel/fsp_broadwell_de/biosacm.bin" if SOC_INTEL_FSP_BROADWELL_DE @@ -51,4 +53,6 @@ Exceptions are Ivy- and Sandy Bridge with 64KB and Purely with 256KB alignment size. Please overwrite it SoC specific.
+endmenu # Intel + endif
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36852 )
Change subject: security/intel: Hide Intel submenu when INTEL_TXT is disabled ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/36852/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36852/1//COMMIT_MSG@10 PS1, Line 10: disabled. It looks odd to break the line after the full-stop. I first thought, Gerrit is showing it wrong ^^
Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36852
to look at the new patch set (#2).
Change subject: security/intel: Hide Intel submenu when INTEL TXT is disabled ......................................................................
security/intel: Hide Intel submenu when INTEL TXT is disabled
An empty submenu Intel is displayed in security menu when INTEL_TXT is disabled. Enable submenu Intel only when INTEL_TXT is enabled.
BUG=N/A TEST=build
Change-Id: Iff1d84ff60a15259b60c6205a63a27ecb26346a3 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/security/intel/Kconfig M src/security/intel/txt/Kconfig 2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/36852/2
Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36852 )
Change subject: security/intel: Hide Intel submenu when INTEL TXT is disabled ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36852/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36852/1//COMMIT_MSG@10 PS1, Line 10: disabled.
It looks odd to break the line after the full-stop. I first thought, […]
Done
Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36852 )
Change subject: security/intel: Hide Intel submenu when INTEL TXT is disabled ......................................................................
security/intel: Hide Intel submenu when INTEL TXT is disabled
An empty submenu Intel is displayed in security menu when INTEL_TXT is disabled. Enable submenu Intel only when INTEL_TXT is enabled.
BUG=N/A TEST=build
Change-Id: Iff1d84ff60a15259b60c6205a63a27ecb26346a3 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36852 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/security/intel/Kconfig M src/security/intel/txt/Kconfig 2 files changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/security/intel/Kconfig b/src/security/intel/Kconfig index 333e385..a4525e7 100644 --- a/src/security/intel/Kconfig +++ b/src/security/intel/Kconfig @@ -13,8 +13,4 @@ ## GNU General Public License for more details. ##
-menu "Intel" - source "src/security/intel/txt/Kconfig" - -endmenu # Intel diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig index 011a41c..97d24fd 100644 --- a/src/security/intel/txt/Kconfig +++ b/src/security/intel/txt/Kconfig @@ -26,6 +26,8 @@
if INTEL_TXT
+menu "Intel" + config INTEL_TXT_BIOSACM_FILE string "BIOS ACM file" default "3rdparty/blobs/soc/intel/fsp_broadwell_de/biosacm.bin" if SOC_INTEL_FSP_BROADWELL_DE @@ -51,4 +53,6 @@ Exceptions are Ivy- and Sandy Bridge with 64KB and Purely with 256KB alignment size. Please overwrite it SoC specific.
+endmenu # Intel + endif
-
Nico Huber (Code Review) -
Philipp Deppenwiese (Code Review)
-
Wim Vervoorn (Code Review)