Change in coreboot[master]: mb/google/guybrush/var/guybrush: Add FPMCU configration

[Furquan Shaikh (Code Review)]

Attention is currently required from: Bhanu Prakash Maiya, Ivy Jian, EricR Lai.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52181 )

Change subject: mb/google/guybrush/var/guybrush: Add FPMCU configration
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Patch Set 9:

(1 comment)

File src/mainboard/google/guybrush/variants/guybrush/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/52181/comment/7d70a187_478c4f86 
PS9, Line 113: register "has_power_resource" = "1"
> I tried configure GPIO_32 to high and GPIO_11 to low in "early_gpio_table" then de-assert reset in "base_gpio_table"

GPIO_11 should not be driven low in early_gpio_table. Else it will break the case of S3 resume.
> But I checked the PPR, both GPIO_11 and GPIO_32 are S5 Domain, does that mean the signals won't retain state in S3 or S0i3?

If both are S5 domain, then it means that they will retain state in S3 and S0i3.