HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16777
-gerrit
commit 0ebc89dfdddf36ac9e0b8404620c55a4ac1c6b2a Author: Elyes HAOUAS ehaouas@noos.fr Date: Tue Sep 27 21:36:55 2016 +0200
mainboard/technexion/tim5690: Use tabs for indents
Change-Id: Icd1f145b3575c6d95dacceb9c0426fbdedcdd686 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/mainboard/technexion/tim5690/acpi/usb.asl | 4 +- src/mainboard/technexion/tim5690/mainboard.c | 48 ++-- src/mainboard/technexion/tim5690/speaker.c | 66 ++--- src/mainboard/technexion/tim5690/tn_post_code.c | 340 ++++++++++++------------ src/mainboard/technexion/tim5690/vgabios.c | 48 ++-- 5 files changed, 253 insertions(+), 253 deletions(-)
diff --git a/src/mainboard/technexion/tim5690/acpi/usb.asl b/src/mainboard/technexion/tim5690/acpi/usb.asl index 5381e76..dbffa39 100644 --- a/src/mainboard/technexion/tim5690/acpi/usb.asl +++ b/src/mainboard/technexion/tim5690/acpi/usb.asl @@ -23,7 +23,7 @@ DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 */ Method(UCOC, 0) { Sleep(20) - Store(0x13,CMTI) + Store(0x13,CMTI) Store(0,GPSL) }
@@ -122,7 +122,7 @@ If (LLessEqual(UOM6,9)) {
/* USB Port 7 overcurrent uses Gpm 7 */ If (LLessEqual(UOM7,9)) { - Scope (_GPE) { + Scope (_GPE) { /* Method (_L1D) { */ Method (_L07) { UCOC() diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c index f84b7a0..8bc1075 100644 --- a/src/mainboard/technexion/tim5690/mainboard.c +++ b/src/mainboard/technexion/tim5690/mainboard.c @@ -82,29 +82,29 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); LDN the register belongs to, before you can access the register. */ static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { - outb(IT8712F_CONFIG_REG_LDN, SIO_BASE); - outb(ldn, SIO_DATA); - outb(index, SIO_BASE); - outb(value, SIO_DATA); + outb(IT8712F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); }
static void it8712f_enter_conf(void) { - /* Enter the configuration state (MB PnP mode). */ - - /* Perform MB PnP setup to put the SIO chip at 0x2e. */ - /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ - /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ - outb(0x87, IT8712F_CONFIGURATION_PORT); - outb(0x01, IT8712F_CONFIGURATION_PORT); - outb(0x55, IT8712F_CONFIGURATION_PORT); - outb(0x55, IT8712F_CONFIGURATION_PORT); + /* Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x2e. */ + /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ + /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ + outb(0x87, IT8712F_CONFIGURATION_PORT); + outb(0x01, IT8712F_CONFIGURATION_PORT); + outb(0x55, IT8712F_CONFIGURATION_PORT); + outb(0x55, IT8712F_CONFIGURATION_PORT); }
static void it8712f_exit_conf(void) { - /* Exit the configuration state (MB PnP mode). */ - it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); + /* Exit the configuration state (MB PnP mode). */ + it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); }
/* set thermal config @@ -173,15 +173,15 @@ static void set_thermal_config(void) /* Mainboard specific GPIO setup. */ static void mb_gpio_init(u16 *iobase) { - /* Init Super I/O GPIOs. */ - it8712f_enter_conf(); - outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX); - outb(IT8712F_GPIO, SIO_DATA); - outb(0x62, SIO_INDEX); - outb((*iobase >> 8), SIO_DATA); - outb(0x63, SIO_INDEX); - outb((*iobase & 0xff), SIO_DATA); - it8712f_exit_conf(); + /* Init Super I/O GPIOs. */ + it8712f_enter_conf(); + outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX); + outb(IT8712F_GPIO, SIO_DATA); + outb(0x62, SIO_INDEX); + outb((*iobase >> 8), SIO_DATA); + outb(0x63, SIO_INDEX); + outb((*iobase & 0xff), SIO_DATA); + it8712f_exit_conf(); }
#if CONFIG_VGA_ROM_RUN diff --git a/src/mainboard/technexion/tim5690/speaker.c b/src/mainboard/technexion/tim5690/speaker.c index 50f510d..7c0ea64 100644 --- a/src/mainboard/technexion/tim5690/speaker.c +++ b/src/mainboard/technexion/tim5690/speaker.c @@ -33,55 +33,55 @@ #include "speaker.h"
void speaker_init(uint8_t time) { - /* SB600 RRG. - * Options_0 - RW - 8 bits - [PM_Reg: 60h]. - * SpkrEn, bit[5]=1b, Setting this bit will configure GPIO2 to be speaker output. - */ + /* SB600 RRG. + * Options_0 - RW - 8 bits - [PM_Reg: 60h]. + * SpkrEn, bit[5]=1b, Setting this bit will configure GPIO2 to be speaker output. + */ #ifdef __PRE_RAM__ - pmio_write(0x60, (pmio_read(0x60) | (1<<5))); + pmio_write(0x60, (pmio_read(0x60) | (1<<5))); #else - pm_iowrite(0x60, (pm_ioread(0x60) | (1<<5))); + pm_iowrite(0x60, (pm_ioread(0x60) | (1<<5))); #endif /* __PRE_RAM__ */
- /* SB600 RRG. - * Tmr1CntrlWord - RW - 8 bits - [IO_Reg: 43h]. - * ModeSelect, bit[3:1]=011b, Square wave output. - * CmmandSelect, bit[5:4]=11b, Read/write least, and then most significant byte. - * CounterSelect, bit[7:6]=10b, Select counter 2. - */ - outb(0xb6, 0x43); + /* SB600 RRG. + * Tmr1CntrlWord - RW - 8 bits - [IO_Reg: 43h]. + * ModeSelect, bit[3:1]=011b, Square wave output. + * CmmandSelect, bit[5:4]=11b, Read/write least, and then most significant byte. + * CounterSelect, bit[7:6]=10b, Select counter 2. + */ + outb(0xb6, 0x43);
- /* SB600 RRG. - * TimerCh2- RW - 8 bits - [IO_Reg: 42h]. - */ - outb(time, 0x42); + /* SB600 RRG. + * TimerCh2- RW - 8 bits - [IO_Reg: 42h]. + */ + outb(time, 0x42); }
void speaker_on_nodelay(void) { - /* SB600 RRG. - * Nmi_Status - RW - 8 bits - [IO_Reg: 61h]. - * SpkrEnable, bit[0]=1b, Enable counter 2 - * SpkrTmrEnable, bit[1]=1b, Speaker timer on - */ - outb(inb(0x61) | 0x03, 0x61); + /* SB600 RRG. + * Nmi_Status - RW - 8 bits - [IO_Reg: 61h]. + * SpkrEnable, bit[0]=1b, Enable counter 2 + * SpkrTmrEnable, bit[1]=1b, Speaker timer on + */ + outb(inb(0x61) | 0x03, 0x61); }
void speaker_on_delay(void) { - speaker_on_nodelay(); - mdelay(100); + speaker_on_nodelay(); + mdelay(100); }
void speaker_off_nodelay(void) { - /* SB600 RRG. - * Nmi_Status - RW - 8 bits - [IO_Reg: 61h]. - * SpkrEnable, bit[0]=0b, Disable counter 2 - * SpkrTmrEnable, bit[1]=0b, Speaker timer off - */ - outb(inb(0x61) & ~0x03, 0x61); + /* SB600 RRG. + * Nmi_Status - RW - 8 bits - [IO_Reg: 61h]. + * SpkrEnable, bit[0]=0b, Disable counter 2 + * SpkrTmrEnable, bit[1]=0b, Speaker timer off + */ + outb(inb(0x61) & ~0x03, 0x61); }
void speaker_off_delay(void) { - speaker_off_nodelay(); - mdelay(100); + speaker_off_nodelay(); + mdelay(100); } diff --git a/src/mainboard/technexion/tim5690/tn_post_code.c b/src/mainboard/technexion/tim5690/tn_post_code.c index 213034a..fba0d75 100644 --- a/src/mainboard/technexion/tim5690/tn_post_code.c +++ b/src/mainboard/technexion/tim5690/tn_post_code.c @@ -35,90 +35,90 @@ // TechNexion's Post Code Initially. void technexion_post_code_init(void) { - uint8_t reg8_data; - device_t dev = 0; - - // SMBus Module and ACPI Block (Device 20, Function 0) - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); - - // LED[bit0]:GPIO0 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pmio_read(0x60); - reg8_data |= (1 << 7); // 1: GPIO if not used by SATA - pmio_write(0x60, reg8_data); - - reg8_data = pci_read_config8(dev, 0x80); - reg8_data = ((reg8_data | (1 << 0)) & ~(1 << 4)); - pci_write_config8(dev, 0x80, reg8_data); - - // LED[bit1]:GPIO1 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pci_read_config8(dev, 0x80); - reg8_data = ((reg8_data | (1 << 1)) & ~(1 << 5)); - pci_write_config8(dev, 0x80, reg8_data); - - // LED[bit2]:GPIO4 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pmio_read(0x5e); - reg8_data &= ~(1 << 7); // 0: GPIO if not used by SATA - pmio_write(0x5e, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa8); - reg8_data |= (1 << 0); - pci_write_config8(dev, 0xa8, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa9); - reg8_data &= ~(1 << 0); - pci_write_config8(dev, 0xa9, reg8_data); - - // LED[bit3]:GPIO6 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pmio_read(0x60); - reg8_data |= (1 << 7); // 1: GPIO if not used by SATA - pmio_write(0x60, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa8); - reg8_data |= (1 << 2); - pci_write_config8(dev, 0xa8, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa9); - reg8_data &= ~(1 << 2); - pci_write_config8(dev, 0xa9, reg8_data); - // LED[bit4]:GPIO7 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pci_read_config8(dev, 0xa8); - reg8_data |= (1 << 3); - pci_write_config8(dev, 0xa8, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa9); - reg8_data &= ~(1 << 3); - pci_write_config8(dev, 0xa9, reg8_data); - - // LED[bit5]:GPIO8 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pci_read_config8(dev, 0xa8); - reg8_data |= (1 << 4); - pci_write_config8(dev, 0xa8, reg8_data); - - reg8_data = pci_read_config8(dev, 0xa9); - reg8_data &= ~(1 << 4); - pci_write_config8(dev, 0xa9, reg8_data); - - // LED[bit6]:GPIO10 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pci_read_config8(dev, 0xab); - reg8_data = ((reg8_data | (1 << 0)) & ~(1 << 1)); - pci_write_config8(dev, 0xab, reg8_data); - - // LED[bit7]:GPIO66 - // This is reference SB600 RRG 4.1.1 GPIO - reg8_data = pmio_read(0x68); - reg8_data &= ~(1 << 5); // 0: GPIO - pmio_write(0x68, reg8_data); - - reg8_data = pci_read_config8(dev, 0x7e); - reg8_data = ((reg8_data | (1 << 1)) & ~(1 << 5)); - pci_write_config8(dev, 0x7e, reg8_data); + uint8_t reg8_data; + device_t dev = 0; + + // SMBus Module and ACPI Block (Device 20, Function 0) + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); + + // LED[bit0]:GPIO0 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pmio_read(0x60); + reg8_data |= (1 << 7); // 1: GPIO if not used by SATA + pmio_write(0x60, reg8_data); + + reg8_data = pci_read_config8(dev, 0x80); + reg8_data = ((reg8_data | (1 << 0)) & ~(1 << 4)); + pci_write_config8(dev, 0x80, reg8_data); + + // LED[bit1]:GPIO1 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pci_read_config8(dev, 0x80); + reg8_data = ((reg8_data | (1 << 1)) & ~(1 << 5)); + pci_write_config8(dev, 0x80, reg8_data); + + // LED[bit2]:GPIO4 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pmio_read(0x5e); + reg8_data &= ~(1 << 7); // 0: GPIO if not used by SATA + pmio_write(0x5e, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa8); + reg8_data |= (1 << 0); + pci_write_config8(dev, 0xa8, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa9); + reg8_data &= ~(1 << 0); + pci_write_config8(dev, 0xa9, reg8_data); + + // LED[bit3]:GPIO6 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pmio_read(0x60); + reg8_data |= (1 << 7); // 1: GPIO if not used by SATA + pmio_write(0x60, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa8); + reg8_data |= (1 << 2); + pci_write_config8(dev, 0xa8, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa9); + reg8_data &= ~(1 << 2); + pci_write_config8(dev, 0xa9, reg8_data); + // LED[bit4]:GPIO7 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pci_read_config8(dev, 0xa8); + reg8_data |= (1 << 3); + pci_write_config8(dev, 0xa8, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa9); + reg8_data &= ~(1 << 3); + pci_write_config8(dev, 0xa9, reg8_data); + + // LED[bit5]:GPIO8 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pci_read_config8(dev, 0xa8); + reg8_data |= (1 << 4); + pci_write_config8(dev, 0xa8, reg8_data); + + reg8_data = pci_read_config8(dev, 0xa9); + reg8_data &= ~(1 << 4); + pci_write_config8(dev, 0xa9, reg8_data); + + // LED[bit6]:GPIO10 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pci_read_config8(dev, 0xab); + reg8_data = ((reg8_data | (1 << 0)) & ~(1 << 1)); + pci_write_config8(dev, 0xab, reg8_data); + + // LED[bit7]:GPIO66 + // This is reference SB600 RRG 4.1.1 GPIO + reg8_data = pmio_read(0x68); + reg8_data &= ~(1 << 5); // 0: GPIO + pmio_write(0x68, reg8_data); + + reg8_data = pci_read_config8(dev, 0x7e); + reg8_data = ((reg8_data | (1 << 1)) & ~(1 << 5)); + pci_write_config8(dev, 0x7e, reg8_data);
}
@@ -128,96 +128,96 @@ void technexion_post_code_init(void) */ void technexion_post_code(uint8_t udata8) { - uint8_t u8_data; - device_t dev = 0; + uint8_t u8_data; + device_t dev = 0;
- // SMBus Module and ACPI Block (Device 20, Function 0) + // SMBus Module and ACPI Block (Device 20, Function 0) #ifdef __PRE_RAM__ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0); #else - dev = dev_find_device(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM, 0); + dev = dev_find_device(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM, 0); #endif
- udata8 = ~(udata8); - - // LED[bit0]:GPIO0 - u8_data = pci_read_config8(dev, 0x80); - if (udata8 & 0x1) { - u8_data |= (1 << 0); - } - else { - u8_data &= ~(1 << 0); - } - pci_write_config8(dev, 0x80, u8_data); - - // LED[bit1]:GPIO1 - u8_data = pci_read_config8(dev, 0x80); - if (udata8 & 0x2) { - u8_data |= (1 << 1); - } - else { - u8_data &= ~(1 << 1); - } - pci_write_config8(dev, 0x80, u8_data); - - // LED[bit2]:GPIO4 - u8_data = pci_read_config8(dev, 0xa8); - if (udata8 & 0x4) { - u8_data |= (1 << 0); - } - else { - u8_data &= ~(1 << 0); - } - pci_write_config8(dev, 0xa8, u8_data); - - // LED[bit3]:GPIO6 - u8_data = pci_read_config8(dev, 0xa8); - if (udata8 & 0x8) { - u8_data |= (1 << 2); - } - else { - u8_data &= ~(1 << 2); - } - pci_write_config8(dev, 0xa8, u8_data); - - // LED[bit4]:GPIO7 - u8_data = pci_read_config8(dev, 0xa8); - if (udata8 & 0x10) { - u8_data |= (1 << 3); - } - else { - u8_data &= ~(1 << 3); - } - pci_write_config8(dev, 0xa8, u8_data); - - // LED[bit5]:GPIO8 - u8_data = pci_read_config8(dev, 0xa8); - if (udata8 & 0x20) { - u8_data |= (1 << 4); - } - else { - u8_data &= ~(1 << 4); - } - pci_write_config8(dev, 0xa8, u8_data); - - // LED[bit6]:GPIO10 - u8_data = pci_read_config8(dev, 0xab); - if (udata8 & 0x40) { - u8_data |= (1 << 0); - } - else { - u8_data &= ~(1 << 0); - } - pci_write_config8(dev, 0xab, u8_data); - - // LED[bit7]:GPIO66 - u8_data = pci_read_config8(dev, 0x7e); - if (udata8 & 0x80) { - u8_data |= (1 << 1); - } - else { - u8_data &= ~(1 << 1); - } - pci_write_config8(dev, 0x7e, u8_data); + udata8 = ~(udata8); + + // LED[bit0]:GPIO0 + u8_data = pci_read_config8(dev, 0x80); + if (udata8 & 0x1) { + u8_data |= (1 << 0); + } + else { + u8_data &= ~(1 << 0); + } + pci_write_config8(dev, 0x80, u8_data); + + // LED[bit1]:GPIO1 + u8_data = pci_read_config8(dev, 0x80); + if (udata8 & 0x2) { + u8_data |= (1 << 1); + } + else { + u8_data &= ~(1 << 1); + } + pci_write_config8(dev, 0x80, u8_data); + + // LED[bit2]:GPIO4 + u8_data = pci_read_config8(dev, 0xa8); + if (udata8 & 0x4) { + u8_data |= (1 << 0); + } + else { + u8_data &= ~(1 << 0); + } + pci_write_config8(dev, 0xa8, u8_data); + + // LED[bit3]:GPIO6 + u8_data = pci_read_config8(dev, 0xa8); + if (udata8 & 0x8) { + u8_data |= (1 << 2); + } + else { + u8_data &= ~(1 << 2); + } + pci_write_config8(dev, 0xa8, u8_data); + + // LED[bit4]:GPIO7 + u8_data = pci_read_config8(dev, 0xa8); + if (udata8 & 0x10) { + u8_data |= (1 << 3); + } + else { + u8_data &= ~(1 << 3); + } + pci_write_config8(dev, 0xa8, u8_data); + + // LED[bit5]:GPIO8 + u8_data = pci_read_config8(dev, 0xa8); + if (udata8 & 0x20) { + u8_data |= (1 << 4); + } + else { + u8_data &= ~(1 << 4); + } + pci_write_config8(dev, 0xa8, u8_data); + + // LED[bit6]:GPIO10 + u8_data = pci_read_config8(dev, 0xab); + if (udata8 & 0x40) { + u8_data |= (1 << 0); + } + else { + u8_data &= ~(1 << 0); + } + pci_write_config8(dev, 0xab, u8_data); + + // LED[bit7]:GPIO66 + u8_data = pci_read_config8(dev, 0x7e); + if (udata8 & 0x80) { + u8_data |= (1 << 1); + } + else { + u8_data &= ~(1 << 1); + } + pci_write_config8(dev, 0x7e, u8_data);
} diff --git a/src/mainboard/technexion/tim5690/vgabios.c b/src/mainboard/technexion/tim5690/vgabios.c index f62bc87..fe4b41c 100644 --- a/src/mainboard/technexion/tim5690/vgabios.c +++ b/src/mainboard/technexion/tim5690/vgabios.c @@ -30,39 +30,39 @@ static rs690_vbios_regs vbios_regs_local; /* Initialization interrupt function */ static void vbios_fun_init(rs690_vbios_regs *vbios_regs) { - vbios_regs_local.int15_regs.fun00_panel_id = vbios_regs->int15_regs.fun00_panel_id; - vbios_regs_local.int15_regs.fun05_tv_standard = vbios_regs->int15_regs.fun05_tv_standard; + vbios_regs_local.int15_regs.fun00_panel_id = vbios_regs->int15_regs.fun00_panel_id; + vbios_regs_local.int15_regs.fun05_tv_standard = vbios_regs->int15_regs.fun05_tv_standard; }
/* BIOS int15 function */ int tim5690_int15_handler(void) { - int res = 0; + int res = 0;
- printk(BIOS_DEBUG, "tim5690_int15_handler\n"); + printk(BIOS_DEBUG, "tim5690_int15_handler\n");
- switch (X86_EAX & 0xffff) { - case AMD_RS690_INT15: - switch (X86_EBX & 0xff) { - case 0x00: - X86_EAX &= ~(0xff); - X86_EBX = (X86_EBX & ~(0xff)) | vbios_regs_local.int15_regs.fun00_panel_id; - res = 1; - break; - case 0x05: - X86_EAX &= ~(0xff); - X86_EBX = (X86_EBX & ~(0xff)) | vbios_regs_local.int15_regs.fun05_tv_standard; - res = 1; - break; - } - break; - default: - printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", - X86_EAX & 0xffff); + switch (X86_EAX & 0xffff) { + case AMD_RS690_INT15: + switch (X86_EBX & 0xff) { + case 0x00: + X86_EAX &= ~(0xff); + X86_EBX = (X86_EBX & ~(0xff)) | vbios_regs_local.int15_regs.fun00_panel_id; + res = 1; + break; + case 0x05: + X86_EAX &= ~(0xff); + X86_EBX = (X86_EBX & ~(0xff)) | vbios_regs_local.int15_regs.fun05_tv_standard; + res = 1; + break; + } break; - } + default: + printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", + X86_EAX & 0xffff); + break; + }
- return res; + return res; }
/* Initialization VBIOS function */
-
HAOUAS Elyes