Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35520 )
Change subject: sb/intel/i82870: Drop unused file ......................................................................
sb/intel/i82870: Drop unused file
Change-Id: I024805769ad05f995a23669a82f5482ce3e7ae70 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/southbridge/intel/i82870/Makefile.inc D src/southbridge/intel/i82870/pci_parity.c 2 files changed, 0 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/35520/1
diff --git a/src/southbridge/intel/i82870/Makefile.inc b/src/southbridge/intel/i82870/Makefile.inc index 790bd01..d6ae171 100644 --- a/src/southbridge/intel/i82870/Makefile.inc +++ b/src/southbridge/intel/i82870/Makefile.inc @@ -2,6 +2,5 @@
ramstage-y += ioapic.c ramstage-y += pcibridge.c -#ramstage-y += pci_parity.c
endif diff --git a/src/southbridge/intel/i82870/pci_parity.c b/src/southbridge/intel/i82870/pci_parity.c deleted file mode 100644 index 3bb05cc..0000000 --- a/src/southbridge/intel/i82870/pci_parity.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <pci.h> -#include <printk.h> -# - -void p64h2_pci_parity_enable(void) -{ - uint8_t reg; - - /* 2SERREN - SERR enable for PCI bridge secondary device */ - /* 2PEREN - Parity error for PCI bridge secondary device */ - pcibios_read_config_byte(1, ((29 << 3) + (0 << 0)), 0x3e, ®); - reg |= ((1 << 1) + (1 << 0)); - pcibios_write_config_byte(1, ((29 << 3) + (0 << 0)), 0x3e, reg); - - /* 2SERREN - SERR enable for PCI bridge secondary device */ - /* 2PEREN - Parity error for PCI bridge secondary device */ - pcibios_read_config_byte(1, ((31 << 3) + (0 << 0)), 0x3e, ®); - reg |= ((1 << 1) + (1 << 0)); - pcibios_write_config_byte(1, ((31 << 3) + (0 << 0)), 0x3e, reg); - - return; -}
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35520 )
Change subject: sb/intel/i82870: Drop unused file ......................................................................
Patch Set 1: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35520 )
Change subject: sb/intel/i82870: Drop unused file ......................................................................
sb/intel/i82870: Drop unused file
Change-Id: I024805769ad05f995a23669a82f5482ce3e7ae70 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35520 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/southbridge/intel/i82870/Makefile.inc D src/southbridge/intel/i82870/pci_parity.c 2 files changed, 0 insertions(+), 36 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/southbridge/intel/i82870/Makefile.inc b/src/southbridge/intel/i82870/Makefile.inc index 790bd01..d6ae171 100644 --- a/src/southbridge/intel/i82870/Makefile.inc +++ b/src/southbridge/intel/i82870/Makefile.inc @@ -2,6 +2,5 @@
ramstage-y += ioapic.c ramstage-y += pcibridge.c -#ramstage-y += pci_parity.c
endif diff --git a/src/southbridge/intel/i82870/pci_parity.c b/src/southbridge/intel/i82870/pci_parity.c deleted file mode 100644 index 3bb05cc..0000000 --- a/src/southbridge/intel/i82870/pci_parity.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <pci.h> -#include <printk.h> -# - -void p64h2_pci_parity_enable(void) -{ - uint8_t reg; - - /* 2SERREN - SERR enable for PCI bridge secondary device */ - /* 2PEREN - Parity error for PCI bridge secondary device */ - pcibios_read_config_byte(1, ((29 << 3) + (0 << 0)), 0x3e, ®); - reg |= ((1 << 1) + (1 << 0)); - pcibios_write_config_byte(1, ((29 << 3) + (0 << 0)), 0x3e, reg); - - /* 2SERREN - SERR enable for PCI bridge secondary device */ - /* 2PEREN - Parity error for PCI bridge secondary device */ - pcibios_read_config_byte(1, ((31 << 3) + (0 << 0)), 0x3e, ®); - reg |= ((1 << 1) + (1 << 0)); - pcibios_write_config_byte(1, ((31 << 3) + (0 << 0)), 0x3e, reg); - - return; -}
-
Kyösti Mälkki (Code Review) -
Nico Huber (Code Review)