Change in ...coreboot[master]: drivers/usb: Enable EHCI debug in postcar stage

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30479

Change subject: drivers/usb: Enable EHCI debug in postcar stage
......................................................................

drivers/usb: Enable EHCI debug in postcar stage

Tested on google/peppy.

Change-Id: I89e1233ccd2cb25a348be95f7c01f5621bd40b84
Signed-off-by: Arthur Heymans 
---
M src/device/Makefile.inc
M src/device/pci_early.c
M src/drivers/usb/Makefile.inc
M src/drivers/usb/ehci_debug.c
M src/include/console/usb.h
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/broadwell/Makefile.inc
M src/southbridge/amd/agesa/hudson/Makefile.inc
M src/southbridge/intel/common/Makefile.inc
9 files changed, 13 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/30479/1

diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc
index 05dbe74..d1ca356 100644
--- a/src/device/Makefile.inc
+++ b/src/device/Makefile.inc
@@ -28,6 +28,7 @@
 romstage-y += device_const.c
 ramstage-y += device_const.c
 romstage-$(CONFIG_PCI) += pci_early.c
+postcar-$(CONFIG_PCI) += pci_early.c

subdirs-y += oprom dram

diff --git a/src/device/pci_early.c b/src/device/pci_early.c
index 6baebe0..3c01cb9 100644
--- a/src/device/pci_early.c
+++ b/src/device/pci_early.c
@@ -20,7 +20,7 @@
 #include <device/pci_def.h>
 #include <delay.h>

-#ifdef __PRE_RAM__
+#if !ENV_RAMSTAGE
 unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last)
 {
    unsigned pos = 0;
diff --git a/src/drivers/usb/Makefile.inc b/src/drivers/usb/Makefile.inc
index 6c46f04..bc58f32 100644
--- a/src/drivers/usb/Makefile.inc
+++ b/src/drivers/usb/Makefile.inc
@@ -1,4 +1,4 @@
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c pci_ehci.c console.c gadget.c
-postcar-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c console.c
+postcar-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c

ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c
index 52b4bdd..bec5164 100644
--- a/src/drivers/usb/ehci_debug.c
+++ b/src/drivers/usb/ehci_debug.c
@@ -725,6 +725,10 @@
    /* USB console init is done early in ramstage if it was
     * not done in romstage, this does not require CBMEM.
     */
-	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_RAMSTAGE)
+	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_POSTCAR)
+		usbdebug_hw_init();
+
+	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_RAMSTAGE
+	    && !IS_ENABLED(CONFIG_POSTCAR_STAGE))
    	usbdebug_hw_init();
 }
diff --git a/src/include/console/usb.h b/src/include/console/usb.h
index 78956d7..23f5f7a 100644
--- a/src/include/console/usb.h
+++ b/src/include/console/usb.h
@@ -29,8 +29,7 @@

#define __CONSOLE_USB_ENABLE__	(IS_ENABLED(CONFIG_CONSOLE_USB) && \
    ((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
-	 (ENV_POSTCAR && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
-	 ENV_RAMSTAGE))
+	 ENV_POSTCAR || ENV_RAMSTAGE))

#define USB_PIPE_FOR_CONSOLE 0
 #define USB_PIPE_FOR_GDB 0
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index a53984e..46f1581 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -88,6 +88,7 @@
 postcar-y += sb_util.c
 postcar-y += nb_util.c
 postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
+postcar-$(CONFIG_USBDEBUG) += enable_usbdebug.c

ramstage-y += BiosCallOuts.c
 ramstage-y += i2c.c
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index caf963c..91d2834 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -62,6 +62,7 @@
 romstage-y += tsc_freq.c
 smm-y      += tsc_freq.c
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+postcar-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-y += ehci.c
 ramstage-y += xhci.c
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index 2bf6f02..1fa9ff3 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -17,6 +17,7 @@
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 ramstage-y += reset.c
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+postcar-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-y += early_setup.c

diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 1a509b1..f4d22f7 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -30,6 +30,7 @@
 smm-y += pmbase.c

romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+postcar-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c

romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c