Attention is currently required from: Zheng Bao. Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/55160
to review the following change.
Change subject: [WIP]amdfwtool: Add a script to replace AMD firmware ......................................................................
[WIP]amdfwtool: Add a script to replace AMD firmware
Change-Id: Ib450277d55ad254234a451e06747121fff731ee0 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- A util/amdfwtool/replace.sh 1 file changed, 65 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/55160/1
diff --git a/util/amdfwtool/replace.sh b/util/amdfwtool/replace.sh new file mode 100755 index 0000000..4f416f4 --- /dev/null +++ b/util/amdfwtool/replace.sh @@ -0,0 +1,65 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0-only + +DIR=$(pwd) +AMDFWTOOL=$DIR/amdfwtool +CBFSTOOL=$DIR/cbfstool + +IMAGE=coreboot.rom +IMAGE_NEW=coreboot_new.rom + +echo FIRMWARE_LOCATION $DIR > $DIR/fw.cfg +cat >>$DIR/fw.cfg <<EOF + + +# type file +# PSP +AMD_PUBKEY_FILE PspDirL20_Typex00.bin +PSPBTLDR_FILE PspDirL20_Typex01.bin +PSPSECUREOS_FILE PspDirL20_Typex02.bin +PSPRCVR_FILE PspDirL10_Typex03.bin +PSP_SMUFW1_SUB0_FILE PspDirL20_Typex08.bin +PSPSECUREDEBUG_FILE PspDirL20_Typex09.bin +PSP_SMUFW2_SUB0_FILE PspDirL20_Typex12.bin +PSP_SEC_DEBUG_FILE PspDirL20_Typex13.bin +PSP_HW_IPCFG_FILE PspDirL20_Typex20.bin +PSP_IKEK_FILE PspDirL20_Typex21.bin +PSP_SECG0_FILE PspDirL20_Typex24.bin +PSP_MP2FW0_FILE PspDirL20_Typex25.bin +AMD_DRIVER_ENTRIES PspDirL20_Typex28.bin +PSP_KVM_ENGINE_DUMMY_FILE PspDirL20_Typex29.bin +PSP_ABL0_FILE PspDirL20_Typex30.bin + +SECURE_POLICY_L1_FILE PspDirL20_Typex45.bin +UNIFIEDUSB_FILE PspDirL20_Typex44.bin +DRTMTA_FILE PspDirL20_Typex47.bin +KEYDBBL_FILE PspDirL20_Typex50.bin +KEYDB_TOS_FILE PspDirL20_Typex51.bin +DMCUERAMDCN21_FILE PspDirL20_Typex58.bin +DMCUINTVECTORSDCN21_FILE PspDirL20_Typex59.bin +PSPBTLDR_AB_FILE PspDirL20_Typex73.bin + +# BDT +PSP_PMUI_FILE1 BiosDirL10_Typex64_1.bin +PSP_PMUD_FILE1 BiosDirL10_Typex65_1.bin +PSP_PMUI_FILE2 BiosDirL10_Typex64_4.bin +PSP_PMUD_FILE2 BiosDirL10_Typex65_4.bin +#PSP_MP2CFG_FILE MP2FWConfig.sbin + + +EOF + +$AMDFWTOOL \ + --instance 0 --apcb BiosDirL20_Typex60.bin --instance 10 --apcb BiosDirL20_Typex68.bin --apob-base 0x2001000 --bios-bin bios_bin_L1 --bios-bin-dest 0x02030000 --bios-uncomp-size 0x10000 --soft-fuse 0x30008041 --use-pspsecureos --load-s0i3 --combo-capable "--token-unlock" --spi-read-mode 2 --spi-speed 0 --spi-micron-flag 0 --config "fw.cfg" --soc-name "Cezanne" --flashsize 0x01000000 \ + --apob-nv-size 0x10000 \ + --apob-nv-base 0xff020000 \ + \ + \ + --location 0xff820000 \ + --multilevel \ + --output amdfw_n.rom + +#reinsert +cp $IMAGE $IMAGE_NEW +$CBFSTOOL $IMAGE_NEW remove -n apu/amdfw +$CBFSTOOL $IMAGE_NEW add -f amdfw_n.rom -n apu/amdfw -t raw -r COREBOOT -b 4286709760
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Bao Zheng (Code Review)