Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop dead code ......................................................................
{sb,soc}/intel/*/acpi/lpc.asl: Drop dead code
This code is not even being build-tested. Drop it before it grows moss.
Change-Id: Iddc635dc5bbc7a8b42e97f4e2f6d579a839d874b Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/southbridge/intel/bd82x6x/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 7 files changed, 0 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/43264/1
diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl index 02e1085..d0bd00a 100644 --- a/src/soc/intel/baytrail/acpi/lpc.asl +++ b/src/soc/intel/baytrail/acpi/lpc.asl @@ -102,8 +102,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index 8b52bc7..0a22162 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -118,10 +118,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -/* - * Disable as Windows doesn't like it, and systems don't seem to use it. - * IRQNoFlags() { 8 } - */ }) }
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl index 4591bb0..fe0b11a 100644 --- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl +++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl @@ -185,8 +185,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index bdb592f..07dea82 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl index c8f4b75..ec26fa1 100644 --- a/src/southbridge/intel/i82801ix/acpi/lpc.asl +++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index df62050..5335a60 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl index f296b5d..e9c1a30 100644 --- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl +++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl @@ -192,8 +192,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop dead code ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43264
to look at the new patch set (#4).
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop dead code ......................................................................
{sb,soc}/intel/*/acpi/lpc.asl: Drop dead code
This code is not even being build-tested. Drop it before it grows moss.
Change-Id: Iddc635dc5bbc7a8b42e97f4e2f6d579a839d874b Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/southbridge/intel/bd82x6x/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 7 files changed, 0 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/43264/4
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop dead code ......................................................................
Abandoned
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop dead code ......................................................................
Restored
Hello build bot (Jenkins), Arthur Heymans, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43264
to look at the new patch set (#6).
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code ......................................................................
{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code
This code has been commented out for a long time. Drop it.
Change-Id: Iddc635dc5bbc7a8b42e97f4e2f6d579a839d874b Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/southbridge/intel/bd82x6x/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 7 files changed, 0 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/43264/6
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code ......................................................................
Patch Set 6: Code-Review+2
git blame agrees 😉
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code ......................................................................
Patch Set 6:
Patch Set 6: Code-Review+2
git blame agrees 😉
Thanks for the review! As usual with most Intel southbridge code, it probably appeared in i82801gx and got copy-pasted to all other chipsets. Quite unsurprising 😜
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43264 )
Change subject: {sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code ......................................................................
{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code
This code has been commented out for a long time. Drop it.
Change-Id: Iddc635dc5bbc7a8b42e97f4e2f6d579a839d874b Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43264 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/baytrail/acpi/lpc.asl M src/soc/intel/braswell/acpi/lpc.asl M src/southbridge/intel/bd82x6x/acpi/lpc.asl M src/southbridge/intel/i82801gx/acpi/lpc.asl M src/southbridge/intel/i82801ix/acpi/lpc.asl M src/southbridge/intel/i82801jx/acpi/lpc.asl M src/southbridge/intel/lynxpoint/acpi/lpc.asl 7 files changed, 0 insertions(+), 18 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl index 9b07ab8..c76cf22 100644 --- a/src/soc/intel/baytrail/acpi/lpc.asl +++ b/src/soc/intel/baytrail/acpi/lpc.asl @@ -102,10 +102,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -/* - * Disable as Windows doesn't like it, and systems don't seem to use it. - * IRQNoFlags() { 8 } - */ }) }
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index 8b52bc7..0a22162 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -118,10 +118,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -/* - * Disable as Windows doesn't like it, and systems don't seem to use it. - * IRQNoFlags() { 8 } - */ }) }
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl index ef19161..85e8d24 100644 --- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl +++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl @@ -184,8 +184,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index 5a1f204..202f6dc 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl index 5a1f204..202f6dc 100644 --- a/src/southbridge/intel/i82801ix/acpi/lpc.asl +++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index 5a1f204..202f6dc 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -167,8 +167,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl index 0f77512..1e9de3c 100644 --- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl +++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl @@ -192,8 +192,6 @@ Name (_CRS, ResourceTemplate() { IO (Decode16, 0x70, 0x70, 1, 8) -// Disable as Windows doesn't like it, and systems don't seem to use it. -// IRQNoFlags() { 8 } }) }
-
Angel Pons (Code Review) -
Michael Niewöhner (Code Review)
-
Tim Wawrzynczak (Code Review)