Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
mb/intel/tglrvp : Add MIPI Camera ACPI
Add MIPI Camera ACPI for enabling Camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- M src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl 2 files changed, 53 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/1
diff --git a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl old mode 100644 new mode 100755 index bd2727e..030b6b5 --- a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl +++ b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl @@ -17,14 +17,14 @@ { Device (IPU0) { - Name (_ADR, 0x00050000) // _ADR: Address - Name (_DDN, "Camera and Imaging Subsystem") // _DDN: DOS Device Name + Name (_ADR, 0x00050000) + Name (_DDN, "Camera and Imaging Subsystem") } }
Scope (_SB.PCI0.IPU0) { - Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + Name (_DSD, Package (0x02) { ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package (0x02) @@ -181,41 +181,40 @@ PowerResource (RCPR, 0x00, 0x0000) { Name (STA, Zero) - Method (_ON, 0, Serialized) // _ON_: Power On + Method (_ON, 0, Serialized) { If ((STA == Zero)) { - // Enable CLK0 - MCCT(0,1,1) // Clock 0, enable, 19.2MHz - // Pull PWREN(GPIO B23) high + /* Enable CLK0 with 19.2MHz */ + MCCT(0,1,1) + /* Pull PWREN(GPIO B23) high */ STXS(GPP_B23) Sleep(5) - // Pull RST(GPIO C15) low + /* Pull RST(GPIO C15) low */ CTXS(GPP_C15) Sleep(5) - // Pull RST high + /* Pull RST high */ STXS(GPP_C15) Sleep(5) Store(1,STA) } }
- Method (_OFF, 0, Serialized) // _OFF: Power Off + Method (_OFF, 0, Serialized) { If ((STA == One)) { - // Pull RST low + /* Pull RST low */ CTXS(GPP_C15) - // Pull PWREN low + /* Pull PWREN low */ CTXS(GPP_B23) - // Disable CLK0 - MCCT(0,0,1) // Clock 0, disable, 19.2MHz - // STA = Zero + /* Disable CLK0 */ + MCCT(0,0,1) Store(0,STA) } }
- Method (_STA, 0, NotSerialized) // _STA: Status + Method (_STA, 0, NotSerialized) { Return (STA) } @@ -223,15 +222,15 @@
Device (CAM0) { - Name (_HID, "OVTI8856") // _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID - Name (_DDN, "Ov 8856 Camera") // _DDN: DOS Device Name - Method (_STA, 0, NotSerialized) // _STA: Status + Name (_HID, "OVTI8856") + Name (_UID, Zero) + Name (_DDN, "Ov 8856 Camera") + Method (_STA, 0, NotSerialized) { Return (0x0F) }
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Name (_CRS, ResourceTemplate () { I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\_SB.PCI0.I2C3", @@ -239,17 +238,17 @@ ) })
- Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + Name (_PR0, Package (0x01) { RCPR })
- Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + Name (_PR3, Package (0x01) { RCPR })
- Name (_DSD, Package (0x04) // _DSD: Device-Specific Data + Name (_DSD, Package (0x04) { ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package (0x01) @@ -338,34 +337,34 @@
Device (VCM0) { - Name (_HID, "PRP0001") // _HID: Hardware ID - Name (_UID, 0x03) // _UID: Unique ID - Name (_DDN, "DW9714 VCM") // _DDN: DOS Device Name - Method (_STA, 0, NotSerialized) // _STA: Status + Name (_HID, "PRP0001") + Name (_UID, 0x03) + Name (_DDN, "DW9714 VCM") + Method (_STA, 0, NotSerialized) { Return (0x0F) }
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Name (_CRS, ResourceTemplate () { I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\_SB.PCI0.I2C3", 0x00, ResourceConsumer, , ) }) - Name (_DEP, Package (0x01) // _DEP: Dependencies + Name (_DEP, Package (0x01) { CAM0 }) - Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + Name (_PR0, Package (0x01) { RCPR }) - Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + Name (_PR3, Package (0x01) { RCPR }) - Name (_DSD, Package (0x02) // _DSD: Device-Specific Data + Name (_DSD, Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package (0x01) @@ -385,35 +384,35 @@ PowerResource (FCPR, 0x00, 0x0000) { Name (STA, Zero) - Method (_ON, 0, Serialized) // _ON_: Power On + Method (_ON, 0, Serialized) { If ((STA == Zero)) { - // Enable CLK1 - MCCT(1,1,1) // Clock 1, enable, 19.2MHz - // Pull PWREN(GPIO R6) high + /* Enable CLK1 with 19.2MHz */ + MCCT(1,1,1) + /* Pull PWREN(GPIO R6) high */ STXS(GPP_R6) Sleep(5) - // Pull RST(GPIO H12) low + /* Pull RST(GPIO H12) low */ CTXS(GPP_H12) Sleep(5) - // Pull RST high + /* Pull RST high */ STXS(GPP_H12) Sleep(5) Store(1,STA) } }
- Method (_OFF, 0, Serialized) // _OFF: Power Off + Method (_OFF, 0, Serialized) { If ((STA == One)) { - // Pull RST low + /* Pull RST low */ CTXS(GPP_H12) - // Pull PWREN low + /* Pull PWREN low */ CTXS(GPP_R6) - // Disable CLK0 - MCCT(1,0,1) // Clock 1, disable, 19.2MHz + /* Disable CLK1 */ + MCCT(1,0,1) Store(0,STA) } } @@ -426,15 +425,15 @@
Device (CAM1) { - Name (_HID, "OVTI8856") // _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID - Name (_DDN, "Ov 8856 Camera") // _DDN: DOS Device Name - Method (_STA, 0, NotSerialized) // _STA: Status + Name (_HID, "OVTI8856") + Name (_UID, Zero) + Name (_DDN, "Ov 8856 Camera") + Method (_STA, 0, NotSerialized) { Return (0x0F) }
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + Name (_CRS, ResourceTemplate () { I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\_SB.PCI0.I2C5", @@ -442,17 +441,17 @@ ) })
- Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + Name (_PR0, Package (0x01) { FCPR })
- Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot + Name (_PR3, Package (0x01) { FCPR })
- Name (_DSD, Package (0x04) // _DSD: Device-Specific Data + Name (_DSD, Package (0x04) { ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package (0x01) diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl index 1b9e952..6874d17 100755 --- a/src/mainboard/intel/tglrvp/dsdt.asl +++ b/src/mainboard/intel/tglrvp/dsdt.asl @@ -89,4 +89,6 @@ // Mainboard specific #include "acpi/mainboard.asl"
+ /* camera */ + #include "acpi/mipi_camera.asl" }
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#2).
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
mb/intel/tglrvp : Add MIPI Camera ACPI
Add MIPI Camera ACPI for enabling Camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- M src/mainboard/intel/tglrvp/dsdt.asl 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#3).
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
mb/intel/tglrvp : Add MIPI Camera ACPI
Add MIPI Camera ACPI for enabling Camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl 2 files changed, 534 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/3
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
Patch Set 4: Code-Review+1
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#5).
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
mb/intel/tglrvp : Add MIPI Camera ACPI
Add MIPI Camera ACPI for enabling Camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 541 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/5
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37863/5/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/5/src/mainboard/intel/tglrvp/... PS5, Line 30: PAD_CFG_GPO(GPP_R6 , 0, PLTRST), space prohibited before that ',' (ctx:WxW)
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#6).
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
mb/intel/tglrvp : Add MIPI Camera ACPI
Add MIPI Camera ACPI for enabling Camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 542 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/6
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37863/5/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/5/src/mainboard/intel/tglrvp/... PS5, Line 30: PAD_CFG_GPO(GPP_R6 , 0, PLTRST),
space prohibited before that ',' (ctx:WxW)
Ack
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Add MIPI Camera ACPI ......................................................................
Patch Set 6: Code-Review+1
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#7).
Change subject: mb/intel/tglrvp : Enable MIPI Camera ......................................................................
mb/intel/tglrvp : Enable MIPI Camera
Enable MIPI Camera - Add MIPI Camera ACPI - Update GPIO pin mux
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 541 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/7
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Enable MIPI Camera ......................................................................
Patch Set 7: Code-Review+1
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp : Enable MIPI Camera ......................................................................
Patch Set 7:
(6 comments)
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@7 PS7, Line 7: nit: remove space
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@9 PS7, Line 9: Enable MIPI Camera remove - redundant with subject line
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@15 PS7, Line 15: check Camera check camera how?
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/acpi/mipi_camera.asl:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 4: 2019 2020
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 68: c nit: capital "C" to be consistent with other comments
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 29: Why is there a blank line here? If there's a reason for separating lines 30 and 31 from other camera configs on line 27 and 28, please add comment as to what it is. Otherwise, please remove line 29.
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#8).
Change subject: mb/intel/tglrvp : Enable MIPI Camera ......................................................................
mb/intel/tglrvp : Enable MIPI Camera
Enable MIPI Camera - Add MIPI Camera ACPI - Update GPIO pin mux
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/8
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#9).
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
mb/intel/tglrvp: Enable MIPI Camera
Add MIPI Camera ACPI Update GPIO pin mux
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/9
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/acpi/mipi_camera.asl:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 4: 2019
2020
Ack
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 68: c
nit: capital "C" to be consistent with other comments
Ack
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/7/src/mainboard/intel/tglrvp/... PS7, Line 29:
Why is there a blank line here? If there's a reason for separating lines 30 and 31 from other camer […]
Ack
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@7 PS7, Line 7:
nit: remove space
Ack
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@9 PS7, Line 9: Enable MIPI Camera
remove - redundant with subject line
Ack
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@15 PS7, Line 15: check Camera
check camera how?
Will update simple way to check Camera
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#11).
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
mb/intel/tglrvp: Enable MIPI Camera
Add MIPI Camera ACPI Update GPIO pin mux
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/11
Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... File src/mainboard/intel/tglrvp/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... PS11, Line 4: 2019 2019-2020
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... PS11, Line 4: 2019 2019-2020
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... File src/mainboard/intel/tglrvp/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... PS11, Line 4: 2019
2019-2020
Ack
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... File src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c:
https://review.coreboot.org/c/coreboot/+/37863/11/src/mainboard/intel/tglrvp... PS11, Line 4: 2019
2019-2020
Ack
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#13).
Change subject: mb/intel/tglrvp: Enable MIPI Camera ......................................................................
mb/intel/tglrvp: Enable MIPI Camera
Add MIPI Camera ACPI Update GPIO pin mux
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check Camera Try to capture image by below commands.
media-ctl -V ""Intel IPU6 CSI-2 5":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI-2 5":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""ov8856 18-0010":0 -> "Intel IPU6 CSI-2 5":0[1]" media-ctl -V ""Intel IPU6 CSI2 BE":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [crop:(0,0)/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""Intel IPU6 CSI-2 5":1 -> "Intel IPU6 CSI2 BE":0[1]" media-ctl -l ""Intel IPU6 CSI2 BE":1 -> "Intel IPU6 CSI2 BE capture":0[1]" yavta -u -c5 -n5 -I -s 3280x2464 --file=/tmp/frame-#.bin -f SGRBG10
$(media-ctl -e "Intel IPU6 CSI2 BE capture")
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/13
Hello Srinidhi N Kaushik, Raj Astekar, Subrata Banik, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37863
to look at the new patch set (#14).
Change subject: mb/intel/tglrvp: Enable MIPI camera ......................................................................
mb/intel/tglrvp: Enable MIPI camera
Add MIPI camera ACPI Update GPIO pin mux for camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check camera
Simple test method to check camera: capture image by below commands from OS console
media-ctl -V ""Intel IPU6 CSI-2 5":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI-2 5":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""ov8856 18-0010":0 -> "Intel IPU6 CSI-2 5":0[1]" media-ctl -V ""Intel IPU6 CSI2 BE":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [crop:(0,0)/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""Intel IPU6 CSI-2 5":1 -> "Intel IPU6 CSI2 BE":0[1]" media-ctl -l ""Intel IPU6 CSI2 BE":1 -> "Intel IPU6 CSI2 BE capture":0[1]" yavta -u -c5 -n5 -I -s 3280x2464 --file=/tmp/frame-#.bin -f SGRBG10
$(media-ctl -e "Intel IPU6 CSI2 BE capture")
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37863/14
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI camera ......................................................................
Patch Set 14: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37863/7//COMMIT_MSG@15 PS7, Line 15: check Camera
Will update simple way to check Camera
Ack
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI camera ......................................................................
Patch Set 14: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37863 )
Change subject: mb/intel/tglrvp: Enable MIPI camera ......................................................................
mb/intel/tglrvp: Enable MIPI camera
Add MIPI camera ACPI Update GPIO pin mux for camera
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check camera
Simple test method to check camera: capture image by below commands from OS console
media-ctl -V ""Intel IPU6 CSI-2 5":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI-2 5":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""ov8856 18-0010":0 -> "Intel IPU6 CSI-2 5":0[1]" media-ctl -V ""Intel IPU6 CSI2 BE":0 [fmt:SGRBG10/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [crop:(0,0)/3280x2464]" media-ctl -V ""Intel IPU6 CSI2 BE":1 [fmt:SGRBG10/3280x2464]" media-ctl -l ""Intel IPU6 CSI-2 5":1 -> "Intel IPU6 CSI2 BE":0[1]" media-ctl -l ""Intel IPU6 CSI2 BE":1 -> "Intel IPU6 CSI2 BE capture":0[1]" yavta -u -c5 -n5 -I -s 3280x2464 --file=/tmp/frame-#.bin -f SGRBG10
$(media-ctl -e "Intel IPU6 CSI2 BE capture")
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I4189e96f68f0e64e0860405e00eeab84564b86be Reviewed-on: https://review.coreboot.org/c/coreboot/+/37863 Reviewed-by: Nick Vaccaro nvaccaro@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A src/mainboard/intel/tglrvp/acpi/mipi_camera.asl M src/mainboard/intel/tglrvp/dsdt.asl M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 3 files changed, 532 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Wonkyu Kim: Looks good to me, but someone else must approve
diff --git a/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl new file mode 100644 index 0000000..c830ea1 --- /dev/null +++ b/src/mainboard/intel/tglrvp/acpi/mipi_camera.asl @@ -0,0 +1,523 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Scope (_SB.PCI0.IPU0) +{ + Name (_DSD, Package (0x02) + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x02) + { + Package (0x02) + { + "port0", + "PRT0" + }, + + Package (0x02) + { + "port1", + "PRT1" + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + One + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (PRT1, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + 2 + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP10" + } + } + }) +} + +Scope (_SB.PCI0.IPU0) +{ + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x04) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04 + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + ^I2C3.CAM0, + Zero, + Zero + } + } + } + }) + Name (EP10, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x04) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04 + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + ^I2C5.CAM1, + Zero, + Zero + } + } + } + }) +} + +Scope (_SB.PCI0.I2C3) +{ + PowerResource (RCPR, 0x00, 0x0000) + { + Name (STA, Zero) + Method (_ON, 0, Serialized) + { + If ((STA == Zero)) + { + /* Enable CLK0 with 19.2MHz */ + MCCT(0,1,1) + /* Pull PWREN(GPIO B23) high */ + STXS(GPP_B23) + Sleep(5) + /* Pull RST(GPIO C15) low */ + CTXS(GPP_C15) + Sleep(5) + /* Pull RST high */ + STXS(GPP_C15) + Sleep(5) + Store(1,STA) + } + } + + Method (_OFF, 0, Serialized) + { + If ((STA == One)) + { + /* Pull RST low */ + CTXS(GPP_C15) + /* Pull PWREN low */ + CTXS(GPP_B23) + /* Disable CLK0 */ + MCCT(0,0,1) + Store(0,STA) + } + } + + Method (_STA, 0, NotSerialized) + { + Return (STA) + } + } + + Device (CAM0) + { + Name (_HID, "OVTI8856") + Name (_UID, Zero) + Name (_DDN, "Ov 8856 Camera") + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + + Name (_PR0, Package (0x01) + { + RCPR + }) + + Name (_PR3, Package (0x01) + { + RCPR + }) + + Name (_DSD, Package (0x04) + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "port0", + "PRT0" + } + }, + + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x02) + { + Package (0x02) + { + "clock-frequency", + 0x0124F800 + }, + Package (0x02) + { + "lens-focus", + Package (0x01) + { + VCM0 + } + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x03) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "link-frequencies", + Package (0x01) + { + 0x325AA000 + } + }, + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + IPU0, + Zero, + Zero + } + } + } + }) + } + + Device (VCM0) + { + Name (_HID, "PRP0001") + Name (_UID, 0x03) + Name (_DDN, "DW9714 VCM") + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + Name (_DEP, Package (0x01) + { + CAM0 + }) + Name (_PR0, Package (0x01) + { + RCPR + }) + Name (_PR3, Package (0x01) + { + RCPR + }) + Name (_DSD, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "compatible", + "dongwoon,dw9714" + } + } + }) + } +} + +Scope (_SB.PCI0.I2C5) +{ + PowerResource (FCPR, 0x00, 0x0000) + { + Name (STA, Zero) + Method (_ON, 0, Serialized) + { + If ((STA == Zero)) + { + /* Enable CLK1 with 19.2MHz */ + MCCT(1,1,1) + /* Pull PWREN(GPIO R6) high */ + STXS(GPP_R6) + Sleep(5) + /* Pull RST(GPIO H12) low */ + CTXS(GPP_H12) + Sleep(5) + /* Pull RST high */ + STXS(GPP_H12) + Sleep(5) + Store(1,STA) + } + } + + Method (_OFF, 0, Serialized) + { + If ((STA == One)) + { + /* Pull RST low */ + CTXS(GPP_H12) + /* Pull PWREN low */ + CTXS(GPP_R6) + /* Disable CLK1 */ + MCCT(1,0,1) + Store(0,STA) + } + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (STA) + } + } + + Device (CAM1) + { + Name (_HID, "OVTI8856") + Name (_UID, Zero) + Name (_DDN, "Ov 8856 Camera") + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C5", + 0x00, ResourceConsumer, , + ) + }) + + Name (_PR0, Package (0x01) + { + FCPR + }) + + Name (_PR3, Package (0x01) + { + FCPR + }) + + Name (_DSD, Package (0x04) + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "port0", + "PRT0" + } + }, + + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "clock-frequency", + 0x0124F800 + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x03) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "link-frequencies", + Package (0x01) + { + 0x325AA000 + } + }, + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + IPU0, + One, + Zero + } + } + } + }) + } +} diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl index 559e1e3..f21ba5d 100644 --- a/src/mainboard/intel/tglrvp/dsdt.asl +++ b/src/mainboard/intel/tglrvp/dsdt.asl @@ -65,4 +65,7 @@ /* Mainboard specific */ #include "acpi/mainboard.asl"
+ /* Camera */ + #include <soc/intel/tigerlake/acpi/ipu.asl> + #include "acpi/mipi_camera.asl" } diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 465e402..69bb931 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -22,6 +22,12 @@ /* PCH M.2 SSD */ PAD_CFG_GPO(GPP_B16, 1, PLTRST), PAD_CFG_GPO(GPP_H0, 1, PLTRST), + + /* Camera */ + PAD_CFG_GPO(GPP_B23, 0, PLTRST), + PAD_CFG_GPO(GPP_C15, 0, PLTRST), + PAD_CFG_GPO(GPP_R6, 0, PLTRST), + PAD_CFG_GPO(GPP_H12, 0, PLTRST), };
/* Early pad configuration in bootblock */
-
build bot (Jenkins) (Code Review) -
Nick Vaccaro (Code Review)
-
Patrick Georgi (Code Review)
-
Pratikkumar V Prajapati (Code Review)
-
Wonkyu Kim (Code Review)