Roy Mingi Park has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32164
Change subject: [WIP]mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
[WIP]mb/google/sarien: Change GPIOs to avoid leakages during s0ix
Change-Id: Ie0208bd6c7affb2e87fd76005b727ea7effdf434 Signed-off-by: Roy Mingi Park roy.mingi.park@intel.com --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/32164/1
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index 1b06301..c6eb3f5 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -71,7 +71,8 @@ /* SPKR */ PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* GSPI0_CS# */ PAD_NC(GPP_B15, NONE), /* PRIM_CORE_OPT_DIS (nostuff) */ /* GSPI0_CLK */ PAD_CFG_GPI(GPP_B16, NONE, DEEP), /* ONE_DIMM# */ -/* GSPI0_MISO */ PAD_CFG_GPI(GPP_B17, NONE, DEEP), /* RTC_DET# */ +/* GSPI0_MISO */ /*PAD_CFG_GPI(GPP_B17, NONE, DEEP),*/ /* RTC_DET# */ +/* GSPI0_MISO */ PAD_NC(GPP_B17, NONE), /* RTC_DET# */ /* GSPI0_MOSI */ PAD_NC(GPP_B18, NONE), /* GSPI1_CS# */ PAD_NC(GPP_B19, NONE), /* HDD_FALL_INT (nostuff) */ /* GSPI1_CLK */ PAD_NC(GPP_B20, NONE), /* TPM_PIRQ# (nostuff) */ @@ -209,8 +210,10 @@ /* I2C3_SCL */ PAD_NC(GPP_H7, NONE), /* I2C4_SDA */ PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), /* I2C_SDA_H1 */ /* I2C4_SCL */ PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), /* I2C_SCL_H1 */ -/* I2C5_SDA */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* ISH_I2C2_SDA */ -/* I2C5_SCL */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* ISH_I2C2_SCL */ +/* I2C5_SDA */ /*PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),*/ /* ISH_I2C2_SDA */ +/* I2C5_SDA */ PAD_NC(GPP_H10, NONE), /* ISH_I2C2_SDA */ +/* I2C5_SCL */ /*PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),*/ /* ISH_I2C2_SCL */ +/* I2C5_SCL */ PAD_NC(GPP_H11, NONE), /* ISH_I2C2_SCL */ /* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE), /* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE), /* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE),
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: [WIP]mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/32164/1/src/mainboard/google/sarien/variants... File src/mainboard/google/sarien/variants/arcada/gpio.c:
https://review.coreboot.org/#/c/32164/1/src/mainboard/google/sarien/variants... PS1, Line 213: /* I2C5_SDA */ /*PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),*/ /* ISH_I2C2_SDA */ line over 80 characters
https://review.coreboot.org/#/c/32164/1/src/mainboard/google/sarien/variants... PS1, Line 215: /* I2C5_SCL */ /*PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),*/ /* ISH_I2C2_SCL */ line over 80 characters
Roy Mingi Park has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Abandoned
Resubmit
Roy Mingi Park has restored this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Restored
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Patch Set 7:
Patch Set 7: Code-Review+1
Please do not +1 to your own changes
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Patch Set 7:
(3 comments)
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG@7 PS7, Line 7: leakages leakage
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG@10 PS7, Line 10: S0iX s0ix.
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG@13 PS7, Line 13: Please remove the empty line between BUG and TEST
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32164/7//COMMIT_MSG@14 PS7, Line 14: platform mention which platform you have tested.
Hello Patrick Rudolph, Duncan Laurie, Lijian Zhao, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32164
to look at the new patch set (#8).
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
mb/google/sarien: Change GPIOs to avoid leakages during s0ix
Three GPIOs are not being used and this change will save 2-3mW power during S0iX and this power saving is only for Arcada
BUG=b:129990365 TEST= Measure total platform power during S0iX from Arcada
Change-Id: Ie0208bd6c7affb2e87fd76005b727ea7effdf434 Signed-off-by: Roy Mingi Park roy.mingi.park@intel.com --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/32164/8
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakages during s0ix ......................................................................
Patch Set 8: Code-Review+2
Hello Patrick Rudolph, Duncan Laurie, Lijian Zhao, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32164
to look at the new patch set (#9).
Change subject: mb/google/sarien: Change GPIOs to avoid leakage during S0iX ......................................................................
mb/google/sarien: Change GPIOs to avoid leakage during S0iX
Three GPIOs are not being used and this change will save 2-3mW power during S0iX and this power saving is only for Arcada
BUG=b:129990365 TEST= Measure total platform power during S0iX from Arcada
Change-Id: Ie0208bd6c7affb2e87fd76005b727ea7effdf434 Signed-off-by: Roy Mingi Park roy.mingi.park@intel.com --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/32164/9
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakage during S0iX ......................................................................
Patch Set 9: Code-Review+2
Next time, mark a "Done" on every review comment so people will know that's already addressed
Roy Mingi Park has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakage during S0iX ......................................................................
Patch Set 9:
Patch Set 9: Code-Review+2
Next time, mark a "Done" on every review comment so people will know that's already addressed
Sure. Thanks.
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32164 )
Change subject: mb/google/sarien: Change GPIOs to avoid leakage during S0iX ......................................................................
mb/google/sarien: Change GPIOs to avoid leakage during S0iX
Three GPIOs are not being used and this change will save 2-3mW power during S0iX and this power saving is only for Arcada
BUG=b:129990365 TEST= Measure total platform power during S0iX from Arcada
Change-Id: Ie0208bd6c7affb2e87fd76005b727ea7effdf434 Signed-off-by: Roy Mingi Park roy.mingi.park@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32164 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Lijian Zhao lijian.zhao@intel.com Reviewed-by: Duncan Laurie dlaurie@chromium.org --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Lijian Zhao: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index 1b06301..570ab4a 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -71,7 +71,7 @@ /* SPKR */ PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* GSPI0_CS# */ PAD_NC(GPP_B15, NONE), /* PRIM_CORE_OPT_DIS (nostuff) */ /* GSPI0_CLK */ PAD_CFG_GPI(GPP_B16, NONE, DEEP), /* ONE_DIMM# */ -/* GSPI0_MISO */ PAD_CFG_GPI(GPP_B17, NONE, DEEP), /* RTC_DET# */ +/* GSPI0_MISO */ PAD_NC(GPP_B17, NONE), /* RTC_DET# */ /* GSPI0_MOSI */ PAD_NC(GPP_B18, NONE), /* GSPI1_CS# */ PAD_NC(GPP_B19, NONE), /* HDD_FALL_INT (nostuff) */ /* GSPI1_CLK */ PAD_NC(GPP_B20, NONE), /* TPM_PIRQ# (nostuff) */ @@ -209,8 +209,8 @@ /* I2C3_SCL */ PAD_NC(GPP_H7, NONE), /* I2C4_SDA */ PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), /* I2C_SDA_H1 */ /* I2C4_SCL */ PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), /* I2C_SCL_H1 */ -/* I2C5_SDA */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* ISH_I2C2_SDA */ -/* I2C5_SCL */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* ISH_I2C2_SCL */ +/* I2C5_SDA */ PAD_NC(GPP_H10, NONE), /* ISH_I2C2_SDA */ +/* I2C5_SCL */ PAD_NC(GPP_H11, NONE), /* ISH_I2C2_SCL */ /* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE), /* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE), /* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE),