Change in coreboot[master]: soc/intel/tgl: add device UART #3 to chipset devicetree

[Michael Niewöhner (Code Review)]

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Angel Pons, Michael Niewöhner, Patrick Rudolph.
Hello Felix Singer, build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Angel Pons, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/62624

to look at the new patch set (#2).

Change subject: soc/intel/tgl: add device UART #3 to chipset devicetree
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soc/intel/tgl: add device UART #3 to chipset devicetree

Reference: Intel doc# 631119-007
Change-Id: I3abccf65d59278b38835cdfda9e54991d6edaacf
Signed-off-by: Michael Niewöhner 
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M src/soc/intel/tigerlake/chipset.cb
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/62624/2