Change in coreboot[master]: riscv: add support for supervisor binary interface (SBI)

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Change subject: riscv: add support for supervisor binary interface (SBI)
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Patch Set 29:

(1 comment)

https://review.coreboot.org/#/c/28096/29/src/arch/riscv/include/mcall.h
File src/arch/riscv/include/mcall.h:

https://review.coreboot.org/#/c/28096/29/src/arch/riscv/include/mcall.h@66
PS29, Line 66:  * MISP needs to be mapped to memory space, it does not define how to map. 
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