Change in coreboot[master]: soc/intel/{skl,cnl}: Guard USB macro parameters

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60324 )

Change subject: soc/intel/{skl,cnl}: Guard USB macro parameters
......................................................................

soc/intel/{skl,cnl}: Guard USB macro parameters

Add parentheses around the parameter of the `USB_PORT_WAKE_ENABLE`
macro to prevent unintentional operator precedence problems.

Change-Id: I61fbacc129cbfb42ade7e64ee40cd07c98d87683
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60324
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by:  Felix Singer 
---
M src/soc/intel/cannonlake/include/soc/usb.h
M src/soc/intel/skylake/include/soc/usb.h
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
   Felix Singer: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/include/soc/usb.h b/src/soc/intel/cannonlake/include/soc/usb.h
index 66b3f8b..20b3149 100644
--- a/src/soc/intel/cannonlake/include/soc/usb.h
+++ b/src/soc/intel/cannonlake/include/soc/usb.h
@@ -191,6 +191,6 @@
  * to Port 1, Bit n corresponds to Port (n+1). This bitmap is later used to
  * decide what ports need to set PORTSCN/PORTSCXUSB3 register bits.
  */
-#define USB_PORT_WAKE_ENABLE(x)		(1 << (x - 1))
+#define USB_PORT_WAKE_ENABLE(x)		(1 << ((x) - 1))

#endif
diff --git a/src/soc/intel/skylake/include/soc/usb.h b/src/soc/intel/skylake/include/soc/usb.h
index d87c859..7912603 100644
--- a/src/soc/intel/skylake/include/soc/usb.h
+++ b/src/soc/intel/skylake/include/soc/usb.h
@@ -185,6 +185,6 @@
  * to Port 1, Bit n corresponds to Port (n+1). This bitmap is later used to
  * decide what ports need to set PORTSCN/PORTSCXUSB3 register bits.
  */
-#define USB_PORT_WAKE_ENABLE(x)		(1 << (x - 1))
+#define USB_PORT_WAKE_ENABLE(x)		(1 << ((x) - 1))

#endif