Change in coreboot[master]: [UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49178 )
Change subject: [UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic ......................................................................
[UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic
The initial steps came out of trace output from a Panther Point system. Add missing Cougar Point steps, and guard Panther Point specific steps.
Change-Id: I2569f9c436f545a5e3ffda5a31ab27c27469f540 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/early_pch.c 1 file changed, 33 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/49178/1
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 0b60d13..e86297b 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -156,7 +156,10 @@ pch_iobp_update(0xeb0040a1, ~(0x3ff << 3), 0x9f << 3); pch_iobp_update(0xec0040a1, ~(0x3ff << 3), 0x9f << 3);
- /* Some CPT-only writes go here */ + if (pch_silicon_type() == PCH_TYPE_CPT) { + pch_iobp_update(0xec004086, ~0, 1 << 30); + pch_iobp_update(0xec004086, ~0, 1 << 31); + }
pch_iobp_update(0xea004001, ~(3 << 10), 1 << 10); pch_iobp_update(0xeb004002, ~0, 1 << 30 | 1 << 21); @@ -189,34 +192,35 @@
/* PPT A0 resume-only xHCI workaround goes here */
- /* TODO: This section is PPT-only */ - pch_iobp_update(0xec00404d, ~(0xff3f << 8), 0xff17 << 8); - pch_iobp_update(0xec000084, ~(1 << 31), 0); - pch_iobp_update(0xec000184, ~(1 << 31), 0); - pch_iobp_update(0xec000284, ~(1 << 31), 0); - pch_iobp_update(0xec000384, ~(1 << 31), 0); - pch_iobp_update(0xec000094, ~0, 0xf << 16); - pch_iobp_update(0xec000194, ~0, 0xf << 16); - pch_iobp_update(0xec000294, ~0, 0xf << 16); - pch_iobp_update(0xec000394, ~0, 0xf << 16); - pch_iobp_update(0xec000096, ~0x3ff, 1); - pch_iobp_update(0xec000196, ~0x3ff, 1); - pch_iobp_update(0xec000296, ~0x3ff, 1); - pch_iobp_update(0xec000396, ~0x3ff, 1); - pch_iobp_update(0xec000001, ~0, 3 << 10 | 1 << 3); - pch_iobp_update(0xec000101, ~0, 3 << 10 | 1 << 3); - pch_iobp_update(0xec000201, ~0, 3 << 10 | 1 << 3); - pch_iobp_update(0xec000301, ~0, 3 << 10 | 1 << 3); - pch_iobp_update(0xec0040b5, ~0xffff, 0xc518); - pch_iobp_update(0xec000087, ~(0xf << 8), 5 << 8); - pch_iobp_update(0xec000187, ~(0xf << 8), 5 << 8); - pch_iobp_update(0xec000287, ~(0xf << 8), 5 << 8); - pch_iobp_update(0xec000387, ~(0xf << 8), 5 << 8); - pch_iobp_update(0xea000050, ~(0xff << 16), 0xbb << 16); - pch_iobp_update(0xea000150, ~(0xff << 16), 0xbb << 16); - pch_iobp_update(0xec007f60, ~(0xf << 8), 0xd << 8); - pch_iobp_update(0xea00008d, ~0, 3 << 20); - pch_iobp_update(0xea00018d, ~0, 3 << 20); + if (pch_silicon_type() == PCH_TYPE_CPT) { + pch_iobp_update(0xec00404d, ~(0xff3f << 8), 0xff17 << 8); + pch_iobp_update(0xec000084, ~(1 << 31), 0); + pch_iobp_update(0xec000184, ~(1 << 31), 0); + pch_iobp_update(0xec000284, ~(1 << 31), 0); + pch_iobp_update(0xec000384, ~(1 << 31), 0); + pch_iobp_update(0xec000094, ~0, 0xf << 16); + pch_iobp_update(0xec000194, ~0, 0xf << 16); + pch_iobp_update(0xec000294, ~0, 0xf << 16); + pch_iobp_update(0xec000394, ~0, 0xf << 16); + pch_iobp_update(0xec000096, ~0x3ff, 1); + pch_iobp_update(0xec000196, ~0x3ff, 1); + pch_iobp_update(0xec000296, ~0x3ff, 1); + pch_iobp_update(0xec000396, ~0x3ff, 1); + pch_iobp_update(0xec000001, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000101, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000201, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000301, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec0040b5, ~0xffff, 0xc518); + pch_iobp_update(0xec000087, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000187, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000287, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000387, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xea000050, ~(0xff << 16), 0xbb << 16); + pch_iobp_update(0xea000150, ~(0xff << 16), 0xbb << 16); + pch_iobp_update(0xec007f60, ~(0xf << 8), 0xd << 8); + pch_iobp_update(0xea00008d, ~0, 3 << 20); + pch_iobp_update(0xea00018d, ~0, 3 << 20); + }
/* TODO: Figure out what these writes mean */ pch_iobp_update(0xec0007b2, 0, 0x04514b5e);
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/49178?usp=email )
Change subject: [UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic ......................................................................
Abandoned
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/49178?usp=email )
Change subject: [UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic ......................................................................
Restored
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/49178?usp=email )
Change subject: [UNTESTED] sb/intel/bd82x6x: Account for PCH type in IOBP magic ......................................................................
Abandoned
No interest in pursuing this
-
Angel Pons (Code Review) -
Stefan Reinauer (Code Review)