[M] Change in coreboot[main]: mb/google/{brya,hades}: use soc index for variant_update_power_limits()

[Subrata Banik (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Paul Menzel, SH Kim, Sumeet R Pawnikar.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81436?usp=email )

Change subject: mb/google/{brya,hades}: use soc index for variant_update_power_limits()
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Patch Set 7:

(1 comment)

File src/mainboard/google/brya/variants/baseboard/brya/ramstage.c:

https://review.coreboot.org/c/coreboot/+/81436/comment/5f765e36_a2c81c6b :
PS5, Line 68: 			soc_config->tdp_pl4 = DIV_ROUND_UP(limits[i].pl4_power,
> SOC will use the lower PL1/PL2 value of MMIO and MSR. If user may want to override PL1/PL2 to higher value than original one which is in MSR, SOC will never take higher one since PL1/PL2 are limited by the lower values in MSR.
> IMO it would be better to set MSR PL1/PL2 values here, how do you think?

I would recommend to land this CL as is and move PL1/PL2 override discussion to a bug.