Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBUS function signatures

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBUS function signatures
......................................................................

soc/amd/stoneyridge: Change some local SMBUS function signatures

Change-Id: Ic912b91daf79ecd2c276a383edcda563891cf643
Signed-off-by: Kyösti Mälkki 
---
M src/soc/amd/stoneyridge/smbus.c
1 file changed, 10 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/38222/1

diff --git a/src/soc/amd/stoneyridge/smbus.c b/src/soc/amd/stoneyridge/smbus.c
index 79f09d6..1116561 100644
--- a/src/soc/amd/stoneyridge/smbus.c
+++ b/src/soc/amd/stoneyridge/smbus.c
@@ -19,23 +19,23 @@
 #include <soc/smbus.h>
 #include <soc/southbridge.h>

-static u8 controller_read8(u32 base, u8 reg)
+static u8 controller_read8(uintptr_t mmio, u8 reg)
 {
-	switch (base) {
+	switch (mmio) {
    case ACPIMMIO_SMBUS_BASE:
    	return smbus_read8(reg);
    case ACPIMMIO_ASF_BASE:
    	return asf_read8(reg);
    default:
-		printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%x\n",
-				base);
+		printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%lx\n",
+				mmio);
    }
    return 0xff;
 }

-static void controller_write8(u32 base, u8 reg, u8 val)
+static void controller_write8(uintptr_t mmio, u8 reg, u8 val)
 {
-	switch (base) {
+	switch (mmio) {
    case ACPIMMIO_SMBUS_BASE:
    	smbus_write8(reg, val);
    	break;
@@ -43,12 +43,12 @@
    	asf_write8(reg, val);
    	break;
    default:
-		printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%x\n",
-				base);
+		printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%lx\n",
+				mmio);
    }
 }

-static int smbus_wait_until_ready(u32 mmio)
+static int smbus_wait_until_ready(uintptr_t mmio)
 {
    u32 loops;
    loops = SMBUS_TIMEOUT;
@@ -64,7 +64,7 @@
    return -2;		/* time out */
 }

-static int smbus_wait_until_done(u32 mmio)
+static int smbus_wait_until_done(uintptr_t mmio)
 {
    u32 loops;
    loops = SMBUS_TIMEOUT;

[Mike Banon (Code Review)]

Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBUS function signatures
......................................................................

Patch Set 3: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBUS function signatures
......................................................................

Patch Set 3: Code-Review+2

(2 comments)

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG@7 
PS3, Line 7: Change
To be more specific, looks like the only change is using `uintptr_t` for the SMBus base address. And well, its name is made shorter.

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG@7 
PS3, Line 7: SMBUS
SMBus

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Kyösti Mälkki (Code Review)]

Hello Angel Pons, Mike Banon, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38222

to look at the new patch set (#4).

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

soc/amd/stoneyridge: Change some local SMBus function signatures

Change-Id: Ic912b91daf79ecd2c276a383edcda563891cf643
Signed-off-by: Kyösti Mälkki 
---
M src/soc/amd/stoneyridge/smbus.c
1 file changed, 10 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/38222/4

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4: Code-Review+2

(2 comments)

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG@7 
PS3, Line 7: Change
> To be more specific, looks like the only change is using `uintptr_t` for the SMBus base address. […]

Ack

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG@7 
PS3, Line 7: SMBUS
> SMBus

Done

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/38222/3//COMMIT_MSG@7 
PS3, Line 7: SMBUS
> SMBus

Done

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4: Code-Review+2

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Richard Spiegel (Code Review)]

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
PS4, Line 67: mmio
Though not for this patch, why an unused input parameter? Maybe you should fix it on another patch.

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
PS4, Line 67: mmio
> Though not for this patch, why an unused input parameter? Maybe you should fix it on another patch.

What do you mean?

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4: Code-Review-2

This is on indefinite hold since forking the copy on picasso/ is currently rejected. I am not going to make the files out-of-sync.

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4:
> Patch Set 4: Code-Review-2
>
> This is on indefinite hold since forking the copy on picasso/ is currently rejected. I am not going to make the files out-of-sync.

Cursed idea: Make picasso/ use its own header, and switch to common code once things can be tested. I would not block cleanups of the entire codebase just for a single platform, especially if that platform is still WIP.

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
PS4, Line 67: mmio
> Though not for this patch, why an unused input parameter?

I disagree with the premise.  This is not a valid concern.

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
PS4, Line 28: 		return asf_read8(reg);
Inspecting the assembly it looked like the compiler is not able to do a good optimisation of this even with these xxx_read8() functions inlined.

The expansion here is:

if (base == A)
      return read8(base + reg)
   else if (base == B)
      return read8(base + reg)
   else
      return -1;

Furthermore, there could be an implicit assert in the source to make sure only the base address of an SMBus host is ever passed:

ASSERT((base == A) || (base == B))

An MMIO operation that at its best optimises to a single x86 instruction takes some 20-25 instructions here. Yes, you can argue that there is no performance impact but the code structure looks weird (to me).

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Angel Pons (Code Review)]

Angel Pons has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Removed Code-Review+2 by Angel Pons

Change in coreboot[master]: soc/amd/stoneyridge: Change some local SMBus function signatures

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: Change some local SMBus function signatures
......................................................................

Patch Set 6:

this change doesn't incorporate using smbus_host.h? I still see function signatures in stoney and picasso (e.g. do_smbus_read_byte). Did you have some patch that aligns on the use of smbus_host.h?

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Aaron Durbin (Code Review)]

Aaron Durbin has uploaded a new patch set (#7) to the change originally created by Kyösti Mälkki. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

soc/amd/stoneyridge: move to using smbus_host.h definitions

The SMBus function declarations were duplicated. Use the common
ones provided by smbus_host.h.

Change-Id: Ic912b91daf79ecd2c276a383edcda563891cf643
Signed-off-by: Kyösti Mälkki 
Signed-off-by: Aaron Durbin 
---
D src/soc/amd/stoneyridge/include/soc/smbus.h
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/smbus.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/amd/stoneyridge/southbridge.c
5 files changed, 13 insertions(+), 41 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/38222/7

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 6:
> Patch Set 6:
>
> this change doesn't incorporate using smbus_host.h? I still see function signatures in stoney and picasso (e.g. do_smbus_read_byte). Did you have some patch that aligns on the use of smbus_host.h?

I unified things starting from here: https://review.coreboot.org/c/coreboot/+/38611

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Aaron Durbin (Code Review)]

Aaron Durbin has uploaded a new patch set (#8) to the change originally created by Kyösti Mälkki. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

soc/amd/stoneyridge: move to using smbus_host.h definitions

The SMBus function declarations were duplicated. Use the common
ones provided by smbus_host.h.

Change-Id: Ic912b91daf79ecd2c276a383edcda563891cf643
Signed-off-by: Kyösti Mälkki 
Signed-off-by: Aaron Durbin 
---
D src/soc/amd/stoneyridge/include/soc/smbus.h
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/smbus.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/amd/stoneyridge/southbridge.c
5 files changed, 13 insertions(+), 41 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/38222/8

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 8: -Code-Review
> Patch Set 6:
>
> this change doesn't incorporate using smbus_host.h? I still see function signatures in stoney and picasso (e.g. do_smbus_read_byte). Did you have some patch that aligns on the use of smbus_host.h?

I had that as an isolated change I did not manage to push yet. I'll catch up with your works instead.

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 8: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/8/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/8/src/soc/amd/stoneyridge/smb... 
PS8, Line 92: int do_smbus_recv_byte(uintptr_t mmio, u8 device)
The way recv_byte() and send_byte() are being used to read SPD eeprom is about twice as fast as using sequence of read_byte(). However, it is always a type of split SMBus transaction that is comparable to index/data addressing like was used with IO 0xcf8/0xcf9. There are SMBus block commands that perform better and might be easier to maintain if we encounter platforms where we have some needs for SMP mutex and/or SMBus multiplexers are present.

With some schedule I feel raminit should not directly call SMBus methods, there is already code present where board variants need to switch between SMBus and CBFS for SPD data.

The block commands already present in southbridge/intel/common might be very much compatible with the SMBus host controller inside AMD silicons. Needs some investigation.

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/4/src/soc/amd/stoneyridge/smb... 
PS4, Line 28: 		return asf_read8(reg);
> Inspecting the assembly it looked like the compiler is not able to do a good optimisation of this ev […]

The SMBus slave side code should not be required to know the base address, slave-side sources are not allowed to include platform-specific host-side headerfiles.

To be addressed at some later date when needs to support SMBus multiplexers is evaluated.

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 9: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/38222/8/src/soc/amd/stoneyridge/smb... 
File src/soc/amd/stoneyridge/smbus.c:

https://review.coreboot.org/c/coreboot/+/38222/8/src/soc/amd/stoneyridge/smb... 
PS8, Line 92: int do_smbus_recv_byte(uintptr_t mmio, u8 device)
> The way recv_byte() and send_byte() are being used to read SPD eeprom is about twice as fast as usin […]

Both Intel and AMD SMBus controllers use Synopsys IP cores, so it's not surprising that they are so similar.

w.r.t. raminit code, a read_spd() abstraction would be better I guess.

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

Patch Set 9: Code-Review+2

Change in coreboot[master]: soc/amd/stoneyridge: move to using smbus_host.h definitions

[Aaron Durbin (Code Review)]

Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38222 )

Change subject: soc/amd/stoneyridge: move to using smbus_host.h definitions
......................................................................

soc/amd/stoneyridge: move to using smbus_host.h definitions

The SMBus function declarations were duplicated. Use the common
ones provided by smbus_host.h.

Change-Id: Ic912b91daf79ecd2c276a383edcda563891cf643
Signed-off-by: Kyösti Mälkki 
Signed-off-by: Aaron Durbin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38222
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
D src/soc/amd/stoneyridge/include/soc/smbus.h
M src/soc/amd/stoneyridge/sm.c
M src/soc/amd/stoneyridge/smbus.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/amd/stoneyridge/southbridge.c
5 files changed, 13 insertions(+), 41 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/amd/stoneyridge/include/soc/smbus.h b/src/soc/amd/stoneyridge/include/soc/smbus.h
deleted file mode 100644
index ada7cfb..0000000
--- a/src/soc/amd/stoneyridge/include/soc/smbus.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __STONEYRIDGE_SMBUS_H__
-#define __STONEYRIDGE_SMBUS_H__
-
-#include <stdint.h>
-#include <soc/iomap.h>
-
-int do_smbus_read_byte(u32 mmio, u8 device, u8 address);
-int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val);
-int do_smbus_recv_byte(u32 mmio, u8 device);
-int do_smbus_send_byte(u32 mmio, u8 device, u8 val);
-
-#endif /* __STONEYRIDGE_SMBUS_H__ */
diff --git a/src/soc/amd/stoneyridge/sm.c b/src/soc/amd/stoneyridge/sm.c
index 2dba0d7..6ecf1cd 100644
--- a/src/soc/amd/stoneyridge/sm.c
+++ b/src/soc/amd/stoneyridge/sm.c
@@ -17,10 +17,10 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/smbus.h>
+#include <device/smbus_host.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <soc/southbridge.h>
-#include <soc/smbus.h>

/*
 * The southbridge enables all USB controllers by default in SMBUS Control.
diff --git a/src/soc/amd/stoneyridge/smbus.c b/src/soc/amd/stoneyridge/smbus.c
index f5a9d60..5474c5c 100644
--- a/src/soc/amd/stoneyridge/smbus.c
+++ b/src/soc/amd/stoneyridge/smbus.c
@@ -15,8 +15,8 @@

#include <stdint.h>
 #include <console/console.h>
+#include <device/smbus_host.h>
 #include <amdblocks/acpimmio.h>
-#include <soc/smbus.h>
 #include <soc/southbridge.h>

/*
@@ -25,7 +25,7 @@
  */
 #define SMBUS_TIMEOUT (100 * 1000 * 10)

-static u8 controller_read8(u32 base, u8 reg)
+static u8 controller_read8(uintptr_t base, u8 reg)
 {
    switch (base) {
    case ACPIMMIO_SMBUS_BASE:
@@ -33,13 +33,13 @@
    case ACPIMMIO_ASF_BASE:
    	return asf_read8(reg);
    default:
-		printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%x\n",
+		printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%lx\n",
    			base);
    }
    return 0xff;
 }

-static void controller_write8(u32 base, u8 reg, u8 val)
+static void controller_write8(uintptr_t base, u8 reg, u8 val)
 {
    switch (base) {
    case ACPIMMIO_SMBUS_BASE:
@@ -49,12 +49,12 @@
    	asf_write8(reg, val);
    	break;
    default:
-		printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%x\n",
+		printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%lx\n",
    			base);
    }
 }

-static int smbus_wait_until_ready(u32 mmio)
+static int smbus_wait_until_ready(uintptr_t mmio)
 {
    u32 loops;
    loops = SMBUS_TIMEOUT;
@@ -70,7 +70,7 @@
    return -2;		/* time out */
 }

-static int smbus_wait_until_done(u32 mmio)
+static int smbus_wait_until_done(uintptr_t mmio)
 {
    u32 loops;
    loops = SMBUS_TIMEOUT;
@@ -89,7 +89,7 @@
    return -3;		/* timeout */
 }

-int do_smbus_recv_byte(u32 mmio, u8 device)
+int do_smbus_recv_byte(uintptr_t mmio, u8 device)
 {
    u8 byte;

@@ -114,7 +114,7 @@
    return byte;
 }

-int do_smbus_send_byte(u32 mmio, u8 device, u8 val)
+int do_smbus_send_byte(uintptr_t mmio, u8 device, u8 val)
 {
    u8 byte;

@@ -139,7 +139,7 @@
    return 0;
 }

-int do_smbus_read_byte(u32 mmio, u8 device, u8 address)
+int do_smbus_read_byte(uintptr_t mmio, u8 device, u8 address)
 {
    u8 byte;

@@ -167,7 +167,7 @@
    return byte;
 }

-int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val)
+int do_smbus_write_byte(uintptr_t mmio, u8 device, u8 address, u8 val)
 {
    u8 byte;

diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c
index e57ecde..b588579 100644
--- a/src/soc/amd/stoneyridge/smbus_spd.c
+++ b/src/soc/amd/stoneyridge/smbus_spd.c
@@ -17,8 +17,8 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
+#include <device/smbus_host.h>
 #include <soc/southbridge.h>
-#include <soc/smbus.h>
 #include <amdblocks/dimm_spd.h>

/*
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index b0aaf24..7732fc9 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -28,7 +28,6 @@
 #include <amdblocks/lpc.h>
 #include <amdblocks/acpi.h>
 #include <soc/southbridge.h>
-#include <soc/smbus.h>
 #include <soc/smi.h>
 #include <soc/amd_pci_int_defs.h>
 #include <delay.h>