[XL] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add header files and romstage code

[Patrick Rudolph (Code Review)]

Attention is currently required from: Jonathan Zhang, TimLiu-SMCI, Johnny Lin, Paul Menzel, Christian Walter, Angel Pons, Jian-Ming Wang, Arthur Heymans, Srinidhi N Kaushik, Shelly Chang, Elyes Haouas, Tim Chu.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72442 )

Change subject: soc/intel/xeon_sp/spr: Add header files and romstage code
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Patch Set 8:

(1 comment)

File src/soc/intel/xeon_sp/spr/romstage.c:

https://review.coreboot.org/c/coreboot/+/72442/comment/90c946ed_2d6b4d0e 
PS8, Line 164: X2apic
m_cfg->X2apic = config->x2apic;

This allows mainboards to enable X2APIC mode, while the default is still APIC mode.