[XS] Change in coreboot[main]: superio/fintek/f81866d: Undo set config mode for HWM

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87274?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: superio/fintek/f81866d: Undo set config mode for HWM
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superio/fintek/f81866d: Undo set config mode for HWM

The hardware monitor provides access to its address space via the base
address stored in LDN 0x4 at index 0x60/0x61. There is no need to set
the configuration mode here, since the registers in the LDN are not
programmed.

Change-Id: Ic27c9eee5a58727a70fc0ebe60a643f45a418d36
Signed-off-by: Maxim Polyakov 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87274
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Felix Held 
Reviewed-by: Paul Menzel 
---
M src/superio/fintek/f81866d/f81866d_hwm.c
1 file changed, 0 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Paul Menzel: Looks good to me, but someone else must approve

diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c
index 2883c02..9862e14 100644
--- a/src/superio/fintek/f81866d/f81866d_hwm.c
+++ b/src/superio/fintek/f81866d/f81866d_hwm.c
@@ -48,8 +48,6 @@
    const struct superio_fintek_f81866d_config *reg = dev->chip_info;
    u16 port = res->base;

-	pnp_enter_conf_mode(dev);
-
    /* Use AMD TSI */
    pnp_write_hwm5_index(port, HWM_AMD_TSI_ADDR, reg->hwm_amd_tsi_addr);
    pnp_write_hwm5_index(port, HWM_AMD_TSI_CONTROL_REG, reg->hwm_amd_tsi_control);
@@ -79,6 +77,4 @@
    /* Set Fan control freq */
    pnp_write_hwm5_index(port, HWM_FAN3_CONTROL, reg->hwm_fan3_control);
    pnp_write_hwm5_index(port, HWM_FAN2_TEMP_MAP_SEL, reg->hwm_fan2_temp_map_select);
-
-	pnp_exit_conf_mode(dev);
 }