Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/21113 )
Change subject: sb/intel/common/spi.c: Port to i82801gx ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/21113/3/src/southbridge/intel/common/spi.c File src/southbridge/intel/common/spi.c:
https://review.coreboot.org/#/c/21113/3/src/southbridge/intel/common/spi.c@3... PS3, Line 342: if ((cntlr.hsfs & HSFS_FDV) && !IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)) move into else block ?
https://review.coreboot.org/#/c/21113/3/src/southbridge/intel/common/spi.c@6... PS3, Line 678: u32 mask = IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) ? 0x00ffffff const
https://review.coreboot.org/#/c/21113/3/src/southbridge/intel/common/spi.c@6... PS3, Line 680: uint32_t addr_old = readl_(cntlr.addr) & ~mask; const
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Patrick Rudolph (Code Review)