Change in coreboot[master]: lenovo/g505s: update the ACPI routing to match the new IRQ routing

[Mike Banon (Code Review)]

Attention is currently required from: Alexander Couzens, Patrick Rudolph.
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58751 )

Change subject: lenovo/g505s: update the ACPI routing to match the new IRQ routing
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Patch Set 1:

(5 comments)

Patchset:

PS1: 
Helpful comments by Arthur Heymans above (there were much more of them but some got resolved)

File src/mainboard/lenovo/g505s/acpi/routing.asl:

https://review.coreboot.org/c/coreboot/+/58751/comment/9c5ea40c_a1bc9323 
PS1, Line 13: IRQ 3
These things are whatever is programmed in INTx# so it's not very useful information.

https://review.coreboot.org/c/coreboot/+/58751/comment/f014816c_5371a62f 
PS1, Line 54: Bus 0, Dev 20
Put this in order?

https://review.coreboot.org/c/coreboot/+/58751/comment/1c0f139e_833c646f 
PS1, Line 66: IRQ 3
This routing table uses APIC interrupts not legacy PIC interrupts so this comment is wrong. You can see that IRQ 16-19 is used this PCI device, not 3

https://review.coreboot.org/c/coreboot/+/58751/comment/530ead7f_290400af 
PS1, Line 123: 1:00.00
This is dynamically allocated so please remove.