Change in coreboot[master]: nb/intel/haswell/northbridge.c: Drop stale comment

[Werner Zeh (Code Review)]

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58922 )

Change subject: nb/intel/haswell/northbridge.c: Drop stale comment
......................................................................

nb/intel/haswell/northbridge.c: Drop stale comment

This can now be controlled with the `MMCONF_BUS_NUMBER` Kconfig option.

Change-Id: If0fdefc5b4339acc843443c551892b397ed39c2e
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58922
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/northbridge/intel/haswell/northbridge.c
1 file changed, 0 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 2322097..9ead46b 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -34,10 +34,6 @@
    return NULL;
 }

-/*
- * TODO: We could determine how many PCIe buses we need in the bar.
- *       For now, that number is hardcoded to a max of 64.
- */
 static struct device_operations pci_domain_ops = {
    .read_resources    = pci_domain_read_resources,
    .set_resources     = pci_domain_set_resources,