Patch set updated for coreboot: 6b8d1c0 NOTFORMERGE: MTRR: Mark all prefetchable resources as WRCOMB.

[Vladimir Serbinenko]

Vladimir Serbinenko ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5149

-gerrit

commit 6b8d1c0f9d6c44648f528fef584a0eb82dc61e76
Author: Vladimir Serbinenko 
Date:   Wed Feb 5 22:21:26 2014 +0100

NOTFORMERGE: MTRR: Mark all prefetchable resources as WRCOMB.

Change-Id: I2ecfd9733b65b6160bc2232d22db7b16692a847f
    Signed-off-by: Vladimir Serbinenko 
---
 src/cpu/x86/mtrr/mtrr.c                 |  7 +++----
 src/include/device/resource.h           |  1 -
 src/northbridge/intel/haswell/gma.c     | 17 +----------------
 src/northbridge/intel/nehalem/gma.c     |  1 -
 src/northbridge/intel/sandybridge/gma.c | 17 +----------------
 5 files changed, 5 insertions(+), 38 deletions(-)

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index ae49053..3b29150 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -181,10 +181,9 @@ static struct memranges *get_physical_address_space(int skip_wrcomb)
    	                        MTRR_TYPE_UNCACHEABLE);

/* Handle any write combining resources. Only prefetchable
-		 * resources with the IORESOURCE_WRCOMB flag are appropriate
-		 * for this MTRR type. */
+		 * resources are appropriate for this MTRR type. */
    	if (!skip_wrcomb) {
-			match = IORESOURCE_PREFETCH | IORESOURCE_WRCOMB;
+			match = IORESOURCE_PREFETCH;
    		mask |= match;
    		memranges_add_resources(addr_space, mask, match,
    					MTRR_TYPE_WRCOMB);
@@ -736,7 +735,7 @@ void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb)
    		mtrr_default_type =
    			calc_var_mtrrs(addr_space, !!above4gb,
    				       address_bits, &need_mtrr);
-		}	
+		}
    }

disable_cache();
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index 4bd9698..2d64c80 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -21,7 +21,6 @@
    					 * to the bus below.
    					 */
 #define IORESOURCE_BRIDGE	0x00080000	/* The IO resource has a bus below it. */
-#define IORESOURCE_WRCOMB	0x00100000	/* Write combining resource. */
 #define IORESOURCE_RESERVE	0x10000000	/* The resource needs to be reserved in the coreboot table */
 #define IORESOURCE_STORED	0x20000000	/* The IO resource assignment has been stored in the device */
 #define IORESOURCE_ASSIGNED	0x40000000	/* An IO resource that has been assigned a value */
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index f9387d5..2ceffe4 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -429,27 +429,12 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
    }
 }

-static void gma_read_resources(struct device *dev)
-{
-	struct resource *res;
-
-	pci_dev_read_resources(dev);
-
-	/* Set the graphics memory to write combining. */
-	res = find_resource(dev, PCI_BASE_ADDRESS_2);
-	if (res == NULL) {
-		printk(BIOS_DEBUG, "gma: memory resource not found.\n");
-		return;
-	}
-	res->flags |= IORESOURCE_WRCOMB;
-}
-
 static struct pci_operations gma_pci_ops = {
    .set_subsystem    = gma_set_subsystem,
 };

static struct device_operations gma_func0_ops = {
-	.read_resources		= gma_read_resources,
+	.read_resources		= pci_dev_read_resources,
    .set_resources		= pci_dev_set_resources,
    .enable_resources	= pci_dev_enable_resources,
    .init			= gma_func0_init,
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index f06e83f..2f13a6b 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -703,7 +703,6 @@ static void gma_read_resources(struct device *dev)
    		   0xd0000001);
    pci_write_config32(dev, PCI_BASE_ADDRESS_2 + 4,
    		   0);
-	res->flags |= IORESOURCE_WRCOMB;
    res->base = (resource_t) 0xd0000000;
    res->size = (resource_t) 0x10000000;
 }
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 0d4eb11..b9a07a2 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -664,27 +664,12 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
    }
 }

-static void gma_read_resources(struct device *dev)
-{
-	struct resource *res;
-
-	pci_dev_read_resources(dev);
-
-	/* Set the graphics memory to write combining. */
-	res = find_resource(dev, PCI_BASE_ADDRESS_2);
-	if (res == NULL) {
-		printk(BIOS_DEBUG, "gma: memory resource not found.\n");
-		return;
-	}
-	res->flags |= IORESOURCE_WRCOMB;
-}
-
 static struct pci_operations gma_pci_ops = {
    .set_subsystem    = gma_set_subsystem,
 };

static struct device_operations gma_func0_ops = {
-	.read_resources		= gma_read_resources,
+	.read_resources		= pci_dev_read_resources,
    .set_resources		= pci_dev_set_resources,
    .enable_resources	= pci_dev_enable_resources,
    .init			= gma_func0_init,