Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30354 )
Change subject: src/mainboard/pcengines/apu1: Enable LPC TPM ......................................................................
src/mainboard/pcengines/apu1: Enable LPC TPM
PC Engines apu1 has a 20 pin LPC header that allows connection of external TPM module.
Add necessary Kconfig option and devicetree entry for TPM.
Change-Id: Ic9f3d41c6e8346a12553386b9c00de6b8fd21abd Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Reviewed-on: https://review.coreboot.org/c/30354 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/pcengines/apu1/Kconfig M src/mainboard/pcengines/apu1/devicetree.cb 2 files changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/mainboard/pcengines/apu1/Kconfig b/src/mainboard/pcengines/apu1/Kconfig index 9d42159..07aaa8c 100644 --- a/src/mainboard/pcengines/apu1/Kconfig +++ b/src/mainboard/pcengines/apu1/Kconfig @@ -31,6 +31,7 @@ select BOARD_ROMSIZE_KB_2048 select GENERIC_SPD_BIN select SEABIOS_ADD_SERCON_PORT_FILE if PAYLOAD_SEABIOS + select MAINBOARD_HAS_LPC_TPM
config MAINBOARD_DIR string diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb index 6af6d2e..2e8b8f4 100644 --- a/src/mainboard/pcengines/apu1/devicetree.cb +++ b/src/mainboard/pcengines/apu1/devicetree.cb @@ -70,6 +70,9 @@ device pnp 2e.607 off end device pnp 2e.e off end end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end # LPC TPM end #LPC device pci 14.4 on end # PCIB 0x4384 always active; pins remapped to gpio by disconnect_pcib = 1 device pci 14.5 off end # OHCI FS/LS USB