Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33177
Change subject: sb/intel/common: Link SPI code in bootblock ......................................................................
sb/intel/common: Link SPI code in bootblock
Change-Id: I2874bc37c6bceb2b22115a09ed1501ce917b4623 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/33177/1
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 4cf6e6f..deab85f 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -45,6 +45,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33177 )
Change subject: sb/intel/common: Link SPI code in bootblock ......................................................................
Patch Set 1:
https://review.coreboot.org/c/coreboot/+/33199 is an alternative patch
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33177 )
Change subject: sb/intel/common: Link SPI code in bootblock ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33177 )
Change subject: sb/intel/common: Link SPI code in bootblock ......................................................................
sb/intel/common: Link SPI code in bootblock
Change-Id: I2874bc37c6bceb2b22115a09ed1501ce917b4623 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33177 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 4cf6e6f..deab85f 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -45,6 +45,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
-
Arthur Heymans (Code Review) -
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)