CK HU has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45395 )
Change subject: soc/mediatek/mt8192: Init PLL in bootblock ......................................................................
soc/mediatek/mt8192: Init PLL in bootblock
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: If16d244e07d9f369efd991132587a92e38200b45 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c 2 files changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/45395/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 8f37c7b..c7dbe51 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -4,6 +4,7 @@ bootblock-y += flash_controller.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/mmu_operations.c +bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c diff --git a/src/soc/mediatek/mt8192/bootblock.c b/src/soc/mediatek/mt8192/bootblock.c index 770c603..8dffe56 100644 --- a/src/soc/mediatek/mt8192/bootblock.c +++ b/src/soc/mediatek/mt8192/bootblock.c @@ -2,10 +2,12 @@
#include <bootblock_common.h> #include <soc/mmu_operations.h> +#include <soc/pll.h> #include <soc/wdt.h>
void bootblock_soc_init(void) { mtk_mmu_init(); mtk_wdt_init(); + mt_pll_init(); }
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45395 )
Change subject: soc/mediatek/mt8192: Init PLL in bootblock ......................................................................
Patch Set 1: Code-Review+1
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45395 )
Change subject: soc/mediatek/mt8192: Init PLL in bootblock ......................................................................
Patch Set 1: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45395 )
Change subject: soc/mediatek/mt8192: Init PLL in bootblock ......................................................................
soc/mediatek/mt8192: Init PLL in bootblock
Signed-off-by: CK Hu ck.hu@mediatek.com Change-Id: If16d244e07d9f369efd991132587a92e38200b45 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45395 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/bootblock.c 2 files changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 8f37c7b..c7dbe51 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -4,6 +4,7 @@ bootblock-y += flash_controller.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/mmu_operations.c +bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c diff --git a/src/soc/mediatek/mt8192/bootblock.c b/src/soc/mediatek/mt8192/bootblock.c index 770c603..8dffe56 100644 --- a/src/soc/mediatek/mt8192/bootblock.c +++ b/src/soc/mediatek/mt8192/bootblock.c @@ -2,10 +2,12 @@
#include <bootblock_common.h> #include <soc/mmu_operations.h> +#include <soc/pll.h> #include <soc/wdt.h>
void bootblock_soc_init(void) { mtk_mmu_init(); mtk_wdt_init(); + mt_pll_init(); }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45395 )
Change subject: soc/mediatek/mt8192: Init PLL in bootblock ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19665 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19664 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/19663 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19662 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/19661 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19669 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19668 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19667 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19666
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
CK HU (Code Review)
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Hung-Te Lin (Code Review)
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Yu-Ping Wu (Code Review)