Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59790 )
Change subject: mb/google/brya: Fix S0i3 regression ......................................................................
mb/google/brya: Fix S0i3 regression
Keeping the PM timer enabled will disqualify an ADL system from entering S0i3, and will also cause an increase in power during suspend states. The PM timer is not required for brya boards, therefore disabling it. Fixes: 0e905801 (soc/intel: transition full control over PM Timer from FSP to coreboot)
BUG=b:206922066 TEST=Boot gimble to OS and verify S0i3 counter incrementing after exiting S0ix suspend states.
Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Change-Id: I8005dacd732c033980ccc479375ff5b06df8dac1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59790 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 4b25af5..cd6c9cc 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -157,4 +157,7 @@ in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time between RST and FCPO).
+config USE_PM_ACPI_TIMER + default n + endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK