[M] Change in coreboot[main]: soc/amd/glinda/cpu: Implement soc_fill_cpu_cache_info helper

[Angel Pons (Code Review)]

Attention is currently required from: Felix Held, Jérémy Compostella, Maximilian Brune, Naresh Solanki, Patrick Rudolph, Paul Menzel.

Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email )

Change subject: soc/amd/glinda/cpu: Implement soc_fill_cpu_cache_info helper
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Patch Set 6:

(1 comment)

File src/soc/amd/glinda/cpu.c:

https://review.coreboot.org/c/coreboot/+/85640/comment/91dc069b_3c251131?usp... :
PS6, Line 42: 	*info = info_list[0];
Now that I think of it, we only need to save the CPU cache info for CPU index 0. For the rest of CPU indices, we only use the cache size and the unique ID. So we might as well use a separate structure. Or, given that the code already seems to assume that cache info is the same for all CPUs (except for size, of course), we could just call `x86_get_cpu_cache_info()` and update the cache size accordingly.