[L] Change in coreboot[main]: Introduce a coreboot Control Block (CCB)

[Simon Glass (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Julius Werner, Jérémy Compostella, Karthik Ramasubramanian, Paul Menzel, Simon Glass.

Simon Glass has posted comments on this change by Simon Glass. ( https://review.coreboot.org/c/coreboot/+/77712?usp=email )

Change subject: Introduce a coreboot Control Block (CCB)
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Patch Set 10:

(1 comment)

Patchset:

PS10:
> > My objection is the -2. […]

We did discuss the various configuration mechanisms available...that was the first thing pointed out and I sent an RFC which I understood resolved the issue.

Overall I feel that Rome wasn't built in a day...this CL has suffered from feature creep from its original (fairly elegant and simple) implementation.

Printing to memory is fine, so long as you eventually get to a point where the memory is sent out to the UART. But you cannot guarantee that in the event of a delay or hamg, so it again defeats the purpose of being able to control console output.

As to the code flow, yes we could have a Kconfig to control when the console is inited, e.g. to allow CCB to only kick in after the initial part of the bootblock starts...but I would like to start somewhere, with the simplest possible implementation that provides useful (and not hamstrung) functionality.