[S] Change in coreboot[main]: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for A...

[Jiaxin Yu (Code Review)]

Attention is currently required from: Hung-Te Lin, Yang Wu, Yidi Lin, Yu-Ping Wu.

Jiaxin Yu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79064?usp=email )

Change subject: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650
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Patch Set 9: Code-Review+1

(1 comment)

File src/mainboard/google/corsola/mainboard.c:

https://review.coreboot.org/c/coreboot/+/79064/comment/cc05345b_f7fe335e :
PS7, Line 43: 	mt_pll_set_aud_div(48 * KHz);
> @jiaxin, does it mean we don't need to configure the clock for ALC5650?

No, beep sound we can use 26M clock to generate i2s bclk/lrck.
This can simplify the steps of configuring the APLL clock.