Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79931?usp=email )
Change subject: soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER ......................................................................
soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER
The Cavium CN81xx SoC selects ECAM_MMCONF_SUPPORT, but doesn't set a value for ECAM_MMCONF_BUS_NUMBER which results in it defaulting to 0 which is wrong. Both the Cavium CN8100 SFF EVB and the OpenCellular Elgon (GBCv2) mainboard specify 32 PCI buses in their Linux devicetree files, so set the SoC's ECAM_MMCONF_BUS_NUMBER Kconfig option to 32 to match this.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Suggested-by: Patrick Rudolph patrick.rudolph@9elements.com Change-Id: Ic98381e2cc597cf23af249c71911545692e40f64 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79931 Reviewed-by: Paul Menzel paulepanter@mailbox.org Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/cavium/cn81xx/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: Patrick Rudolph: Looks good to me, approved Nico Huber: Looks good to me, but someone else must approve build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig index 368581f..5593685 100644 --- a/src/soc/cavium/cn81xx/Kconfig +++ b/src/soc/cavium/cn81xx/Kconfig @@ -39,4 +39,7 @@ config ECAM_MMCONF_BASE_ADDRESS default 0x848000000000
+config ECAM_MMCONF_BUS_NUMBER + default 32 + endif