Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change will configure GPIOs as per schematics.
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/44416/1
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c index d67f4a4..02ddcbe 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c @@ -31,6 +31,9 @@ /* PMC_PLT_RST_N */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
+ /* CAM1_RST_N */ + PAD_CFG_GPO(GPP_B14, 0, PLTRST), + /* M.2_WLAN_PERST_N */ PAD_CFG_GPO(GPP_B17, 1, PLTRST),
@@ -76,9 +79,18 @@ /* CAM2_PWREN */ PAD_CFG_GPO(GPP_D4, 0, PLTRST),
+ /* CAM1_PWREN */ + PAD_CFG_GPO(GPP_D5, 0, PLTRST), + /*LAN_RST_N*/ PAD_CFG_GPO(GPP_D6, 1, PLTRST),
+ /* I2C4B_SDA */ + PAD_CFG_NF(GPP_D12, NONE, PLTRST, NF3), + + /* I2C4B_SCL */ + PAD_CFG_NF(GPP_D13, NONE, PLTRST, NF3), + /* AVS_I2S_MCLK */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
@@ -97,6 +109,9 @@ /* I2C5_SCL */ PAD_CFG_NF(GPP_D23, NONE, PLTRST, NF1),
+ /* IMGCLKOUT_0 */ + PAD_CFG_NF(GPP_E0, NONE, PLTRST, NF2), + /* IMGCLKOUT_1 */ PAD_CFG_NF(GPP_E2, NONE, PLTRST, NF1),
Hello build bot (Jenkins), Maulik V Vaghela, Sugnan Prabhu S, Rizwan Qureshi, Ronak Kanabar, Aamir Bohra,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44416
to look at the new patch set (#2).
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change will configure Camera related GPIOs as per schematics.
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/44416/2
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c:
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 83: 0 shouldn't this be 1? or driver drivers it from PR0?
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 89: PLTRST DEEP
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 92: PLTRST DEEP
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 113: PLTRST DEEP
Hello build bot (Jenkins), Maulik V Vaghela, Sugnan Prabhu S, Rizwan Qureshi, Subrata Banik, Aamir Bohra, Ronak Kanabar,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44416
to look at the new patch set (#3).
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change will configure Camera related GPIOs as per schematics.
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/44416/3
Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... File src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c:
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 83: 0
shouldn't this be 1? or driver drivers it from PR0?
Drivers drives it
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 89: PLTRST
DEEP
Done
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 92: PLTRST
DEEP
Done
https://review.coreboot.org/c/coreboot/+/44416/2/src/mainboard/intel/jasperl... PS2, Line 113: PLTRST
DEEP
Done
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
Patch Set 3: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG@9 PS3, Line 9: schematics list down the gpios configured in commit message?
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG@9 PS3, Line 9: will configure configures user facing
Hello build bot (Jenkins), Maulik V Vaghela, Sugnan Prabhu S, Rizwan Qureshi, Subrata Banik, Aamir Bohra, Ronak Kanabar,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44416
to look at the new patch set (#4).
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change configures user facing camera related GPIOs as per schematics. 1. GPP_D5 pwr_en 2. GPP_B14 reset 3. GPP_E0 clock 4. GPP_D12 I2C4b 5. GPP_D13 I2C4b
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/44416/4
Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG@9 PS3, Line 9: schematics
list down the gpios configured in commit message?
Done
https://review.coreboot.org/c/coreboot/+/44416/3//COMMIT_MSG@9 PS3, Line 9: will configure
configures user facing
Done
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44416 )
Change subject: mb/intel/jasperlake_rvp: Configure GPIOs related to UFC ......................................................................
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change configures user facing camera related GPIOs as per schematics. 1. GPP_D5 pwr_en 2. GPP_B14 reset 3. GPP_E0 clock 4. GPP_D12 I2C4b 5. GPP_D13 I2C4b
Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44416 Reviewed-by: Ronak Kanabar ronak.kanabar@intel.com Reviewed-by: Aamir Bohra aamir.bohra@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c 1 file changed, 15 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aamir Bohra: Looks good to me, approved Ronak Kanabar: Looks good to me, approved
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c index d67f4a4..21e25ab 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c @@ -31,6 +31,9 @@ /* PMC_PLT_RST_N */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
+ /* CAM1_RST_N */ + PAD_CFG_GPO(GPP_B14, 0, PLTRST), + /* M.2_WLAN_PERST_N */ PAD_CFG_GPO(GPP_B17, 1, PLTRST),
@@ -76,9 +79,18 @@ /* CAM2_PWREN */ PAD_CFG_GPO(GPP_D4, 0, PLTRST),
+ /* CAM1_PWREN */ + PAD_CFG_GPO(GPP_D5, 0, PLTRST), + /*LAN_RST_N*/ PAD_CFG_GPO(GPP_D6, 1, PLTRST),
+ /* I2C4B_SDA */ + PAD_CFG_NF(GPP_D12, NONE, DEEP, NF3), + + /* I2C4B_SCL */ + PAD_CFG_NF(GPP_D13, NONE, DEEP, NF3), + /* AVS_I2S_MCLK */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
@@ -97,6 +109,9 @@ /* I2C5_SCL */ PAD_CFG_NF(GPP_D23, NONE, PLTRST, NF1),
+ /* IMGCLKOUT_0 */ + PAD_CFG_NF(GPP_E0, NONE, DEEP, NF2), + /* IMGCLKOUT_1 */ PAD_CFG_NF(GPP_E2, NONE, PLTRST, NF1),
-
Aamir Bohra (Code Review) -
Patrick Georgi (Code Review)
-
Ronak Kanabar (Code Review)
-
Varshit B Pandya (Code Review)