Change in ...coreboot[master]: cpu/intel/haswell: Link monotonic_timer.c in early stages
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33191
Change subject: cpu/intel/haswell: Link monotonic_timer.c in early stages ......................................................................
cpu/intel/haswell: Link monotonic_timer.c in early stages
This is needed for SPI flash console in bootblock/romstage/postcar.
Change-Id: I18253cc028e87cd31879d722a6d788917e9c97b3 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/haswell/Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33191/1
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 1e7d226..fa467e5 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -17,6 +17,9 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y) +bootblock-y += monotonic_timer.c +romstage-y += monotonic_timer.c +postcar-y += monotonic_timer.c ramstage-y += monotonic_timer.c smm-y += monotonic_timer.c endif
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33191 )
Change subject: cpu/intel/haswell: Link monotonic_timer.c in early stages ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33191 )
Change subject: cpu/intel/haswell: Link monotonic_timer.c in early stages ......................................................................
cpu/intel/haswell: Link monotonic_timer.c in early stages
This is needed for SPI flash console in bootblock/romstage/postcar.
Change-Id: I18253cc028e87cd31879d722a6d788917e9c97b3 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33191 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/cpu/intel/haswell/Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 1e7d226..fa467e5 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -17,6 +17,9 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y) +bootblock-y += monotonic_timer.c +romstage-y += monotonic_timer.c +postcar-y += monotonic_timer.c ramstage-y += monotonic_timer.c smm-y += monotonic_timer.c endif
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Arthur Heymans (Code Review) -
Patrick Georgi (Code Review)