[L] Change in coreboot[main]: mb/asrock: Add Z77 Extreme4

[Angel Pons (Code Review)]

Attention is currently required from: Riku Viitanen.

Angel Pons has posted comments on this change by Riku Viitanen. ( https://review.coreboot.org/c/coreboot/+/85772?usp=email )

Change subject: mb/asrock: Add Z77 Extreme4
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Patch Set 3:

(7 comments)

Commit Message:

PS3: 
Which OSes did you test?

File src/mainboard/asrock/z77_extreme4/Kconfig:

https://review.coreboot.org/c/coreboot/+/85772/comment/0afe1f37_f47980c6?usp... :
PS3, Line 19: 	select SUPERIO_NUVOTON_NCT6776
Try selecting some Kconfig for Nuvoton that ends in `_COM_A`. Might help make serial work.

File src/mainboard/asrock/z77_extreme4/cmos.layout:

https://review.coreboot.org/c/coreboot/+/85772/comment/42d6acb4_8aded20c?usp... :
PS3, Line 27:  Sandy Bridge MRC Scrambler Seed values
            : 896	32	r	0	mrc_scrambler_seed
            : 928	32	r	0	mrc_scrambler_seed_s3
            : 960	16	r	0	mrc_scrambler_seed_chk
Only used with MRC.bin and this board is native-only. Please remove.

File src/mainboard/asrock/z77_extreme4/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/85772/comment/98a61117_82590f8f?usp... :
PS3, Line 16: # bifurcated from peg10
It is, by design. The PCIe lanes can't come from any other place.

File src/mainboard/asrock/z77_extreme4/dsdt.asl:

https://review.coreboot.org/c/coreboot/+/85772/comment/54f734aa_a3596d43?usp... :
PS3, Line 10: // OEM revision
Looks like autoport copypasta, please remove if so

https://review.coreboot.org/c/coreboot/+/85772/comment/cb70678e_cce6de1e?usp... :
PS3, Line 21: Scope (_SB) {
            : 		Device (PCI0)
            : 		{
            : 		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
            : 		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
            : 		}
            : 	}
nit: Old autoport versions used to emit this incoherent use of tabs and brace location. Would be nice to fix.

File src/mainboard/asrock/z77_extreme4/mainboard.c:

PS3: 
Was VBIOS tested?