Change in coreboot[master]: [WIP]drivers/spi: Add status register lockdown

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/25106

Change subject: [WIP]drivers/spi: Add status register lockdown
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[WIP]drivers/spi: Add status register lockdown

Implement status register lockdown for Winbond devices.

Change-Id: If99fc7d61692e3926cd1a92e40c9d64f8fa5463d
Signed-off-by: Patrick Rudolph 
---
M src/drivers/spi/spi_flash.c
M src/drivers/spi/winbond.c
M src/include/spi_flash.h
3 files changed, 39 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/25106/1

diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 769ef48..86a3a9f 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -474,6 +474,21 @@
    return flash->ops->set_write_protection(flash, region);
 }

+int spi_flash_lock(const struct spi_flash *flash)
+{
+	if (!flash)
+		return -1;
+
+	if (flash->ops->lock_status_register) {
+		printk(BIOS_WARNING, "SPI: Locking status register is not "
+		       "implemented for this vendor.\n");
+		return 0;
+	}
+
+	return flash->ops->lock_status_register(flash);
+}
+
+
 static uint32_t volatile_group_count CAR_GLOBAL;

int spi_flash_volatile_group_begin(const struct spi_flash *flash)
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c
index 2992dc3..bea0c05 100644
--- a/src/drivers/spi/winbond.c
+++ b/src/drivers/spi/winbond.c
@@ -18,6 +18,7 @@
 #define CMD_W25_RDSR		0x05	/* Read Status Register */
 #define CMD_W25_WRSR		0x01	/* Write Status Register */
 #define CMD_W25_RDSR2		0x35	/* Read Status2 Register */
+#define  STS_W25_SRL		0x01	/* Status Register Lock */
 #define CMD_W25_WRSR2		0x31	/* Write Status2 Register */
 #define CMD_W25_RDSR3		0x15	/* Read Status3 Register */
 #define CMD_W25_WRSR3		0x11	/* Write Status3 Register */
@@ -474,6 +475,14 @@
    return winbond_set_b_protect_protection(flash, region);
 }

+static int winbond_lock_status_register(const struct spi_flash *flash)
+{
+	u8 reg = STS_W25_SRL;
+
+	return spi_flash_cmd(&flash->spi, CMD_W25_WRSR2, &reg,
+				sizeof(reg));
+}
+
 static const struct spi_flash_ops spi_flash_ops = {
    .write = winbond_write,
    .erase = spi_flash_cmd_erase,
@@ -485,6 +494,7 @@
 #endif
    .get_write_protection = winbond_get_write_protection,
    .set_write_protection = winbond_set_write_protection,
+	.lock_status_register = winbond_lock_status_register,
 };

int spi_flash_probe_winbond(const struct spi_slave *spi, u8 *idcode,
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index d1dfa92..ae86c42 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -44,6 +44,7 @@
    			    const struct region *region);
    int (*set_write_protection)(const struct spi_flash *flash,
    			    const struct region *region);
+	int (*lock_status_register)(const struct spi_flash *flash);
 };

struct spi_flash {
@@ -133,6 +134,19 @@
    			  const struct region *region);

/*
+ * Active software status register lockdown.
+ * After the execution of this command, the flash regions marked as read-only,
+ * can't be written to, until the next power cycle.
+ *
+ * @param flash : A SPI flash device
+ *
+ * Returns:
+ *  -1   on error
+ *   0   on success
+ */
+int spi_flash_lock(const struct spi_flash *flash);
+
+/*
  * Some SPI controllers require exclusive access to SPI flash when volatile
  * operations like erase or write are being performed. In such cases,
  * volatile_group_begin will gain exclusive access to SPI flash if not already