Julia Tsai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44080 )
Change subject: mb/google/volteer/variant/lindar: Update gpio settings and overridetree.cb ......................................................................
mb/google/volteer/variant/lindar: Update gpio settings and overridetree.cb
Based on schematic and gpio table of lindar, generate gpio settings and overridetree.cb for lindar.
BUG=b:161089195 TEST=FW_NAME=lindar emerge-volteer coreboot chromeos-bootimage
Signed-off-by: Julia Tsai julia.tsai@lcfc.corp-partner.google.com Change-Id: Id08ea6270b53806214b0e49af826453b37c02a42 --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/variants/lindar/overridetree.cb 2 files changed, 117 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/44080/1
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 05ad93f..baa71cb 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -107,7 +107,7 @@ default "delbin" if BOARD_GOOGLE_DELBIN default "eldrid" if BOARD_GOOGLE_ELDRID default "halvor" if BOARD_GOOGLE_HALVOR - default "lindar" if BOARD_GOOGLE_LINDAR + default "lindar" if BOARD_GOOGLE_LINDAR default "malefor" if BOARD_GOOGLE_MALEFOR default "terrador" if BOARD_GOOGLE_TERRADOR default "todor" if BOARD_GOOGLE_TODOR diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb index 32204c5..c84ed83 100644 --- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb +++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb @@ -1,6 +1,120 @@ chip soc/intel/tigerlake
- device domain 0 on - end + # USB Port Config + register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0 + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C C1 + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera + register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C C0 + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0 + register "usb3_ports[1]" = "USB3_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Type-A / Type-C Not Used + register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Type-A / Type-C Not Used + + register "SaGv" = "SaGv_Disabled" + + # I2C Port Config + register "SerialIoI2cMode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C4] = PchSerialIoDisabled, + [PchSerialIoIndexI2C5] = PchSerialIoPci, + }" + + device domain 0 on + device pci 07.0 off end # TBT_PCIe0 0x9A23 + device pci 07.1 off end # TBT_PCIe1 0x9A25 + device pci 07.2 off end # TBT_PCIe2 0x9A27 + device pci 07.3 off end # TBT_PCIe3 0x9A29 + device pci 15.0 on + chip drivers/i2c/generic + register "hid" = ""10EC5682"" + register "name" = ""RT58"" + register "desc" = ""Headset Codec"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)" + # Set the jd_src to RT5668_JD1 for jack detection + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + end # I2C0 + device pci 15.1 on + chip drivers/i2c/hid + register "generic.hid" = ""GDIX0000"" + register "generic.desc" = ""Goodix Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" + register "generic.reset_delay_ms" = "120" + register "generic.reset_off_delay_ms" = "3" + register "generic.enable_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" + register "generic.enable_delay_ms" = "12" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 5d on end + end + end # I2C1 + device pci 15.2 on + chip drivers/i2c/sx9310 + register "desc" = ""SAR0 Proximity Sensor"" + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" + register "speed" = "I2C_SPEED_FAST" + register "uid" = "0" + register "reg_prox_ctrl0" = "0x10" + register "reg_prox_ctrl1" = "0x00" + register "reg_prox_ctrl2" = "0x84" + register "reg_prox_ctrl3" = "0x0e" + register "reg_prox_ctrl4" = "0x07" + register "reg_prox_ctrl5" = "0xc6" + register "reg_prox_ctrl6" = "0x20" + register "reg_prox_ctrl7" = "0x0d" + register "reg_prox_ctrl8" = "0x8d" + register "reg_prox_ctrl9" = "0x43" + register "reg_prox_ctrl10" = "0x1f" + register "reg_prox_ctrl11" = "0x00" + register "reg_prox_ctrl12" = "0x00" + register "reg_prox_ctrl13" = "0x00" + register "reg_prox_ctrl14" = "0x00" + register "reg_prox_ctrl15" = "0x00" + register "reg_prox_ctrl16" = "0x00" + register "reg_prox_ctrl17" = "0x00" + register "reg_prox_ctrl18" = "0x00" + register "reg_prox_ctrl19" = "0x00" + register "reg_sar_ctrl0" = "0x50" + register "reg_sar_ctrl1" = "0x8a" + register "reg_sar_ctrl2" = "0x3c" + device i2c 28 on end + end + end # I2C2 0xA0EA + device pci 19.1 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" + register "wake" = "GPE0_DW2_15" + register "probed" = "1" + device i2c 15 on end + end + end # I2C5 0xA0C6 + device pci 1f.3 on + chip drivers/generic/max98357a + register "hid" = ""MX98357A"" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)" + register "sdmode_delay" = "5" + device generic 0 on end + end + end # Intel HD audio + end end
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44080
to look at the new patch set (#2).
Change subject: mb/google/volteer/variant/lindar: update overridetree.cb ......................................................................
mb/google/volteer/variant/lindar: update overridetree.cb
Based on schematic modify overridetree.cb for lindar.
BUG=b:161089195 TEST=FW_NAME=lindar emerge-volteer coreboot chromeos-bootimage
Signed-off-by: Julia Tsai julia.tsai@lcfc.corp-partner.google.com Change-Id: Id08ea6270b53806214b0e49af826453b37c02a42 --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/variants/lindar/overridetree.cb 2 files changed, 117 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/44080/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44080
to look at the new patch set (#3).
Change subject: mb/google/volteer/variant/lindar: Update overridetree.cb ......................................................................
mb/google/volteer/variant/lindar: Update overridetree.cb
Based on schematic overridetree.cb for lindar.
BUG=b:161089195 TEST=FW_NAME=lindar emerge-volteer coreboot chromeos-bootimage
Signed-off-by: Julia Tsai julia.tsai@lcfc.corp-partner.google.com Change-Id: Id08ea6270b53806214b0e49af826453b37c02a42 --- M src/mainboard/google/volteer/variants/lindar/overridetree.cb 1 file changed, 116 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/44080/3
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44080 )
Change subject: mb/google/volteer/variant/lindar: Update overridetree.cb ......................................................................
Patch Set 3:
Same here, I'd apply these changes when adding the Lindar variant
Julia Tsai has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44080 )
Change subject: mb/google/volteer/variant/lindar: Update overridetree.cb ......................................................................
Abandoned
Abandon for combine to 44079