Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
soc/intel/cannonlake: Add 4E/4F to early io init
Change-Id: Ie47474e9bf1edfe98555a148469c41283e9a4ea6 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/soc/intel/cannonlake/bootblock/pch.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/34862/1
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index c43d6d8..a3252c2 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -159,7 +159,7 @@
void pch_early_iorange_init(void) { - uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | + uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66 | LPC_IOE_LGE_200;
/* IO Decode Range */
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
Patch Set 1: Code-Review+2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
Patch Set 1: Code-Review+2
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34862/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34862/1//COMMIT_MSG@8 PS1, Line 8: Please add the reasoning to the commit message.
Hello Patrick Rudolph, Felix Held, Frans Hendriks, Philipp Deppenwiese, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34862
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
soc/intel/cannonlake: Add 4E/4F to early io init
This is needed for the AST2500 to work, because it uses 4E/4F.
Change-Id: Ie47474e9bf1edfe98555a148469c41283e9a4ea6 Signed-off-by: Christian Walter christian.walter@9elements.com --- M src/soc/intel/cannonlake/bootblock/pch.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/34862/2
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34862/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34862/1//COMMIT_MSG@8 PS1, Line 8:
Please add the reasoning to the commit message.
Ack
Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34862 )
Change subject: soc/intel/cannonlake: Add 4E/4F to early io init ......................................................................
soc/intel/cannonlake: Add 4E/4F to early io init
This is needed for the AST2500 to work, because it uses 4E/4F.
Change-Id: Ie47474e9bf1edfe98555a148469c41283e9a4ea6 Signed-off-by: Christian Walter christian.walter@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34862 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Frans Hendriks fhendriks@eltan.com --- M src/soc/intel/cannonlake/bootblock/pch.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved Felix Held: Looks good to me, approved Frans Hendriks: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index c43d6d8..a3252c2 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -159,7 +159,7 @@
void pch_early_iorange_init(void) { - uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | + uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66 | LPC_IOE_LGE_200;
/* IO Decode Range */