V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Updat gpio_op.asl to ASL2.0 syntax ......................................................................
soc/intel/jasperlake: Updat gpio_op.asl to ASL2.0 syntax
This change updates gpio_op.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for wdoo.
Change-Id: I3ec442ad85f408135642a112873231ce7d39524e Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/jasperlake/acpi/gpio_op.asl 1 file changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/41864/1
diff --git a/src/soc/intel/jasperlake/acpi/gpio_op.asl b/src/soc/intel/jasperlake/acpi/gpio_op.asl index 16e7690..683686f 100644 --- a/src/soc/intel/jasperlake/acpi/gpio_op.asl +++ b/src/soc/intel/jasperlake/acpi/gpio_op.asl @@ -11,7 +11,7 @@ { VAL0, 32 } - And (PAD_CFG0_RX_STATE, ShiftRight (VAL0, PAD_CFG0_RX_STATE_BIT), Local0) + Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
Return (Local0) } @@ -27,7 +27,7 @@ { VAL0, 32 } - And (PAD_CFG0_TX_STATE, VAL0, Local0) + Local0 = PAD_CFG0_TX_STATE & VAL0
Return (Local0) } @@ -43,7 +43,7 @@ { VAL0, 32 } - Or (PAD_CFG0_TX_STATE, VAL0, VAL0) + VAL0 = PAD_CFG0_TX_STATE | VAL0 }
/* @@ -57,7 +57,7 @@ { VAL0, 32 } - And (Not (PAD_CFG0_TX_STATE), VAL0, VAL0) + VAL0 = ~PAD_CFG0_TX_STATE & VAL0 }
/* @@ -76,10 +76,10 @@ { VAL0, 32 } - Store (VAL0, Local0) - And (Not (PAD_CFG0_MODE_MASK), Local0, Local0) - And (ShiftLeft (Arg1, PAD_CFG0_MODE_SHIFT, Arg1), PAD_CFG0_MODE_MASK, Arg1) - Or (Local0, Arg1, VAL0) + Local0 = VAL0 + Local0 = ~PAD_CFG0_MODE_MASK & Local0 + Arg1 = (Arg1 <<= PAD_CFG0_MODE_SHIFT) & PAD_CFG0_MODE_MASK + VAL0 = Local0 | Arg1 }
/* @@ -97,10 +97,10 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_TX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_TX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_TX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_TX_DISABLE | VAL0 } }
@@ -119,9 +119,9 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_RX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_RX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_RX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_RX_DISABLE | VAL0 } }
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Updat gpio_op.asl to ASL2.0 syntax ......................................................................
Patch Set 1: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Updat gpio_op.asl to ASL2.0 syntax ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/41864/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41864/1//COMMIT_MSG@7 PS1, Line 7: Updat Update
Hello build bot (Jenkins), Selma Bensaid, Subrata Banik, Arthur Heymans, Alexey Buyanov, Patrick Rudolph, Venkata Krishna Nimmagadda,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41864
to look at the new patch set (#2).
Change subject: soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax ......................................................................
soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax
This change updates gpio_op.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for wdoo.
Change-Id: I3ec442ad85f408135642a112873231ce7d39524e Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/jasperlake/acpi/gpio_op.asl 1 file changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/41864/2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41864/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41864/1//COMMIT_MSG@7 PS1, Line 7: Updat
Update
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax ......................................................................
soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax
This change updates gpio_op.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
TEST=Verified using --timeless option to abuild that the resulting coreboot.rom is same as without the ASL2.0 syntax changes for wdoo.
Change-Id: I3ec442ad85f408135642a112873231ce7d39524e Signed-off-by: V Sowmya v.sowmya@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41864 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/acpi/gpio_op.asl 1 file changed, 16 insertions(+), 16 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/jasperlake/acpi/gpio_op.asl b/src/soc/intel/jasperlake/acpi/gpio_op.asl index 16e7690..683686f 100644 --- a/src/soc/intel/jasperlake/acpi/gpio_op.asl +++ b/src/soc/intel/jasperlake/acpi/gpio_op.asl @@ -11,7 +11,7 @@ { VAL0, 32 } - And (PAD_CFG0_RX_STATE, ShiftRight (VAL0, PAD_CFG0_RX_STATE_BIT), Local0) + Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
Return (Local0) } @@ -27,7 +27,7 @@ { VAL0, 32 } - And (PAD_CFG0_TX_STATE, VAL0, Local0) + Local0 = PAD_CFG0_TX_STATE & VAL0
Return (Local0) } @@ -43,7 +43,7 @@ { VAL0, 32 } - Or (PAD_CFG0_TX_STATE, VAL0, VAL0) + VAL0 = PAD_CFG0_TX_STATE | VAL0 }
/* @@ -57,7 +57,7 @@ { VAL0, 32 } - And (Not (PAD_CFG0_TX_STATE), VAL0, VAL0) + VAL0 = ~PAD_CFG0_TX_STATE & VAL0 }
/* @@ -76,10 +76,10 @@ { VAL0, 32 } - Store (VAL0, Local0) - And (Not (PAD_CFG0_MODE_MASK), Local0, Local0) - And (ShiftLeft (Arg1, PAD_CFG0_MODE_SHIFT, Arg1), PAD_CFG0_MODE_MASK, Arg1) - Or (Local0, Arg1, VAL0) + Local0 = VAL0 + Local0 = ~PAD_CFG0_MODE_MASK & Local0 + Arg1 = (Arg1 <<= PAD_CFG0_MODE_SHIFT) & PAD_CFG0_MODE_MASK + VAL0 = Local0 | Arg1 }
/* @@ -97,10 +97,10 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_TX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_TX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_TX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_TX_DISABLE | VAL0 } }
@@ -119,9 +119,9 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_RX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_RX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_RX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_RX_DISABLE | VAL0 } }
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41864 )
Change subject: soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntax ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4660 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4659 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4658 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4657
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Arthur Heymans (Code Review)
-
Patrick Georgi (Code Review)
-
Subrata Banik (Code Review)
-
V Sowmya (Code Review)