Change in coreboot[master]: intelblocks/gpio: Add NAVFWE bit to PAD_CFG_DW0 mask definition

[Maulik V Vaghela (Code Review)]

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Patrick Rudolph.
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/54350

to look at the new patch set (#2).

Change subject: intelblocks/gpio: Add NAVFWE bit to PAD_CFG_DW0 mask definition
......................................................................

intelblocks/gpio: Add NAVFWE bit to PAD_CFG_DW0 mask definition

Definition for NAV_FWE BIT was added in below CL:
https://review.coreboot.org/c/coreboot/+/52782

Even if try to set this BIT it was not getting set since PAD_CFG_DW0
mask will make it 0 since this bit was not part of mask.
Adding NAV_FWE to mask will resolve this issue and BIT will be set/unset
as per programming in mainboard.

TEST=Check GPIO register dump and see if BIT is getting set properly.

Change-Id: I970ae81ed36da45c3acc61814980b2e6ff889445
Signed-off-by: Maulik V Vaghela 
---
M src/soc/intel/common/block/gpio/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/54350/2