HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32855
Change subject: util: Fix typo on plural form of index ......................................................................
util: Fix typo on plural form of index
Change-Id: Idc165f8eafacf3130a29b701bc3610c1a67f69d5 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M util/romcc/romcc.c M util/romcc/tests/linux_test5.c M util/romcc/tests/raminit_test6.c M util/romcc/tests/raminit_test7.c M util/romcc/tests/simple_test46.c M util/romcc/tests/simple_test54.c M util/x86/x86_page_tables.go 7 files changed, 35 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/32855/1
diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c index 43be171..c6507dc 100644 --- a/util/romcc/romcc.c +++ b/util/romcc/romcc.c @@ -14111,9 +14111,9 @@ struct block *block; struct triple *old_result, *first, *ins; size_t count, idx; - unsigned long used_indicies; + unsigned long used_indices; int i, max_index; -#define MAX_INDICIES (sizeof(used_indicies)*CHAR_BIT) +#define MAX_INDICES (sizeof(used_indices)*CHAR_BIT) #define ID_BITS(X) ((X) & (TRIPLE_FLAG_LOCAL -1)) struct { unsigned id; @@ -14183,7 +14183,7 @@ * * To gurantee that stability I lookup the variables * to see where they have been used before and - * I build my final list with the assigned indicies. + * I build my final list with the assigned indices. */ vars = 0; if (enclose_triple(old_result)) { @@ -14202,8 +14202,8 @@ ordered_triple_set(&vars, set->member); }
- /* Lookup the current indicies of the live varialbe */ - used_indicies = 0; + /* Lookup the current indices of the live varialbe */ + used_indices = 0; max_index = -1; for(set = vars; set ; set = set->next) { struct triple *ins; @@ -14214,14 +14214,14 @@ if (index < 0) { continue; } - if (index >= MAX_INDICIES) { + if (index >= MAX_INDICES) { internal_error(state, ins, "index unexpectedly large"); } - if (used_indicies & (1 << index)) { + if (used_indices & (1 << index)) { internal_error(state, ins, "index previously used?"); } - /* Remember which indicies have been used */ - used_indicies |= (1 << index); + /* Remember which indices have been used */ + used_indices |= (1 << index); if (index > max_index) { max_index = index; } @@ -14239,31 +14239,31 @@ continue; } /* Find the lowest unused index value */ - for(index = 0; index < MAX_INDICIES; index++) { - if (!(used_indicies & ((uint64_t)1 << index))) { + for(index = 0; index < MAX_INDICES; index++) { + if (!(used_indices & ((uint64_t)1 << index))) { break; } } - if (index == MAX_INDICIES) { - internal_error(state, ins, "no free indicies?"); + if (index == MAX_INDICES) { + internal_error(state, ins, "no free indices?"); } info[ID_BITS(ins->id)].index = index; - /* Remember which indicies have been used */ - used_indicies |= (1 << index); + /* Remember which indices have been used */ + used_indices |= (1 << index); if (index > max_index) { max_index = index; } }
/* Build the return list of variables with positions matching - * their indicies. + * their indices. */ *enclose = 0; last_var = enclose; for(i = 0; i <= max_index; i++) { struct triple *var; var = 0; - if (used_indicies & (1 << i)) { + if (used_indices & (1 << i)) { for(set = vars; set; set = set->next) { int index; index = info[ID_BITS(set->member->id)].index; diff --git a/util/romcc/tests/linux_test5.c b/util/romcc/tests/linux_test5.c index cf0df46..e94d5d7 100644 --- a/util/romcc/tests/linux_test5.c +++ b/util/romcc/tests/linux_test5.c @@ -156,7 +156,7 @@ unsigned device; uint32_t value;
- static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [NBCAP_MEMCLK_200MHZ] = 0x50, /* 5ns */ [NBCAP_MEMCLK_166MHZ] = 0x60, /* 6ns */ @@ -224,7 +224,7 @@ continue; } debug('D'); - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]); if (value < 0) continue;
debug('E'); @@ -310,7 +310,7 @@ }
/* Read the min_cycle_time for this latency */ - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]);
/* All is good if the selected clock speed * is what I need or slower. diff --git a/util/romcc/tests/raminit_test6.c b/util/romcc/tests/raminit_test6.c index e99e355..8048dce 100644 --- a/util/romcc/tests/raminit_test6.c +++ b/util/romcc/tests/raminit_test6.c @@ -1621,7 +1621,7 @@ unsigned min_cycle_time, min_latency; int i; uint32_t value; - static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [0 ] = 0x50, [1 ] = 0x60, @@ -1651,7 +1651,7 @@ (!(latencies & (1 << latency)))) { continue; } - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); if (value < 0) { continue; } @@ -1701,7 +1701,7 @@ }
- value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]);
if (value <= min_cycle_time) { diff --git a/util/romcc/tests/raminit_test7.c b/util/romcc/tests/raminit_test7.c index 184e912..c768e86 100644 --- a/util/romcc/tests/raminit_test7.c +++ b/util/romcc/tests/raminit_test7.c @@ -1626,7 +1626,7 @@ unsigned min_cycle_time, min_latency; int i; uint32_t value; - static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [0 ] = 0x50, [1 ] = 0x60, @@ -1656,7 +1656,7 @@ (!(latencies & (1 << latency)))) { continue; } - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); if (value < 0) { continue; } @@ -1706,7 +1706,7 @@ }
- value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]);
if (value <= min_cycle_time) { diff --git a/util/romcc/tests/simple_test46.c b/util/romcc/tests/simple_test46.c index 0b83125..2d3764e4 100644 --- a/util/romcc/tests/simple_test46.c +++ b/util/romcc/tests/simple_test46.c @@ -1,6 +1,6 @@ static void spd_set_memclk(void) { - static const int indicies[] = { 26, 23, 9 }; + static const int indices[] = { 26, 23, 9 }; int new_cycle_time, new_latency; int index; unsigned min_cycle_time, min_latency; @@ -15,7 +15,7 @@ for(index = 0; index < 3; index++) { unsigned long loops; unsigned long address; - address = indicies[index]; + address = indices[index]; loops = 1000000; do { } while(--loops); diff --git a/util/romcc/tests/simple_test54.c b/util/romcc/tests/simple_test54.c index 37dce79..b7dee66 100644 --- a/util/romcc/tests/simple_test54.c +++ b/util/romcc/tests/simple_test54.c @@ -569,7 +569,7 @@ unsigned device; uint32_t value;
- static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [NBCAP_MEMCLK_200MHZ] = 0x50, /* 5ns */ [NBCAP_MEMCLK_166MHZ] = 0x60, /* 6ns */ @@ -637,7 +637,7 @@ continue; } debug('D'); - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]); if (value < 0) continue;
debug('E'); @@ -723,7 +723,7 @@ }
/* Read the min_cycle_time for this latency */ - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]);
/* All is good if the selected clock speed * is what I need or slower. diff --git a/util/x86/x86_page_tables.go b/util/x86/x86_page_tables.go index 2dc0ed3..e477b54 100644 --- a/util/x86/x86_page_tables.go +++ b/util/x86/x86_page_tables.go @@ -223,7 +223,7 @@ return nil }
-// This map represents what the IA32_PAT MSR should be at runtime. The indicies +// This map represents what the IA32_PAT MSR should be at runtime. The indices // are what the linux kernel uses. Reserved entries are not used. // 0 WB : _PAGE_CACHE_MODE_WB // 1 WC : _PAGE_CACHE_MODE_WC @@ -523,11 +523,11 @@ return as }
-func (as *addressSpace) deleteEntries(indicies []int) { +func (as *addressSpace) deleteEntries(indices []int) { // deletions need to be processed in reverse order so as not // delete the wrong entries - sort.Sort(sort.Reverse(sort.IntSlice(indicies))) - for _, i := range indicies { + sort.Sort(sort.Reverse(sort.IntSlice(indices))) + for _, i := range indices { as.ranges = append(as.ranges[:i], as.ranges[i+1:]...) } }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32855 )
Change subject: util: Fix typo on plural form of index ......................................................................
Patch Set 1:
(9 comments)
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c File util/romcc/romcc.c:
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c@14217 PS1, Line 14217: if (index >= MAX_INDICES) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c@14220 PS1, Line 14220: if (used_indices & (1 << index)) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c@14242 PS1, Line 14242: for(index = 0; index < MAX_INDICES; index++) { space required before the open parenthesis '('
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c@14243 PS1, Line 14243: if (!(used_indices & ((uint64_t)1 << index))) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/32855/1/util/romcc/romcc.c@14247 PS1, Line 14247: if (index == MAX_INDICES) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test6.c File util/romcc/tests/raminit_test6.c:
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test6.c@165... PS1, Line 1654: value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); line over 80 characters
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test6.c@170... PS1, Line 1704: value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); line over 80 characters
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test7.c File util/romcc/tests/raminit_test7.c:
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test7.c@165... PS1, Line 1659: value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); line over 80 characters
https://review.coreboot.org/#/c/32855/1/util/romcc/tests/raminit_test7.c@170... PS1, Line 1709: value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); line over 80 characters
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32855 )
Change subject: util: Fix typo on plural form of index ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32855 )
Change subject: util: Fix typo on plural form of index ......................................................................
util: Fix typo on plural form of index
Change-Id: Idc165f8eafacf3130a29b701bc3610c1a67f69d5 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/32855 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Jacob Garber jgarber1@ualberta.ca --- M util/romcc/romcc.c M util/romcc/tests/linux_test5.c M util/romcc/tests/raminit_test6.c M util/romcc/tests/raminit_test7.c M util/romcc/tests/simple_test46.c M util/romcc/tests/simple_test54.c M util/x86/x86_page_tables.go 7 files changed, 35 insertions(+), 35 deletions(-)
Approvals: build bot (Jenkins): Verified Jacob Garber: Looks good to me, approved
diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c index 43be171..c6507dc 100644 --- a/util/romcc/romcc.c +++ b/util/romcc/romcc.c @@ -14111,9 +14111,9 @@ struct block *block; struct triple *old_result, *first, *ins; size_t count, idx; - unsigned long used_indicies; + unsigned long used_indices; int i, max_index; -#define MAX_INDICIES (sizeof(used_indicies)*CHAR_BIT) +#define MAX_INDICES (sizeof(used_indices)*CHAR_BIT) #define ID_BITS(X) ((X) & (TRIPLE_FLAG_LOCAL -1)) struct { unsigned id; @@ -14183,7 +14183,7 @@ * * To gurantee that stability I lookup the variables * to see where they have been used before and - * I build my final list with the assigned indicies. + * I build my final list with the assigned indices. */ vars = 0; if (enclose_triple(old_result)) { @@ -14202,8 +14202,8 @@ ordered_triple_set(&vars, set->member); }
- /* Lookup the current indicies of the live varialbe */ - used_indicies = 0; + /* Lookup the current indices of the live varialbe */ + used_indices = 0; max_index = -1; for(set = vars; set ; set = set->next) { struct triple *ins; @@ -14214,14 +14214,14 @@ if (index < 0) { continue; } - if (index >= MAX_INDICIES) { + if (index >= MAX_INDICES) { internal_error(state, ins, "index unexpectedly large"); } - if (used_indicies & (1 << index)) { + if (used_indices & (1 << index)) { internal_error(state, ins, "index previously used?"); } - /* Remember which indicies have been used */ - used_indicies |= (1 << index); + /* Remember which indices have been used */ + used_indices |= (1 << index); if (index > max_index) { max_index = index; } @@ -14239,31 +14239,31 @@ continue; } /* Find the lowest unused index value */ - for(index = 0; index < MAX_INDICIES; index++) { - if (!(used_indicies & ((uint64_t)1 << index))) { + for(index = 0; index < MAX_INDICES; index++) { + if (!(used_indices & ((uint64_t)1 << index))) { break; } } - if (index == MAX_INDICIES) { - internal_error(state, ins, "no free indicies?"); + if (index == MAX_INDICES) { + internal_error(state, ins, "no free indices?"); } info[ID_BITS(ins->id)].index = index; - /* Remember which indicies have been used */ - used_indicies |= (1 << index); + /* Remember which indices have been used */ + used_indices |= (1 << index); if (index > max_index) { max_index = index; } }
/* Build the return list of variables with positions matching - * their indicies. + * their indices. */ *enclose = 0; last_var = enclose; for(i = 0; i <= max_index; i++) { struct triple *var; var = 0; - if (used_indicies & (1 << i)) { + if (used_indices & (1 << i)) { for(set = vars; set; set = set->next) { int index; index = info[ID_BITS(set->member->id)].index; diff --git a/util/romcc/tests/linux_test5.c b/util/romcc/tests/linux_test5.c index cf0df46..e94d5d7 100644 --- a/util/romcc/tests/linux_test5.c +++ b/util/romcc/tests/linux_test5.c @@ -156,7 +156,7 @@ unsigned device; uint32_t value;
- static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [NBCAP_MEMCLK_200MHZ] = 0x50, /* 5ns */ [NBCAP_MEMCLK_166MHZ] = 0x60, /* 6ns */ @@ -224,7 +224,7 @@ continue; } debug('D'); - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]); if (value < 0) continue;
debug('E'); @@ -310,7 +310,7 @@ }
/* Read the min_cycle_time for this latency */ - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]);
/* All is good if the selected clock speed * is what I need or slower. diff --git a/util/romcc/tests/raminit_test6.c b/util/romcc/tests/raminit_test6.c index e99e355..8048dce 100644 --- a/util/romcc/tests/raminit_test6.c +++ b/util/romcc/tests/raminit_test6.c @@ -1621,7 +1621,7 @@ unsigned min_cycle_time, min_latency; int i; uint32_t value; - static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [0 ] = 0x50, [1 ] = 0x60, @@ -1651,7 +1651,7 @@ (!(latencies & (1 << latency)))) { continue; } - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); if (value < 0) { continue; } @@ -1701,7 +1701,7 @@ }
- value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]);
if (value <= min_cycle_time) { diff --git a/util/romcc/tests/raminit_test7.c b/util/romcc/tests/raminit_test7.c index 184e912..c768e86 100644 --- a/util/romcc/tests/raminit_test7.c +++ b/util/romcc/tests/raminit_test7.c @@ -1626,7 +1626,7 @@ unsigned min_cycle_time, min_latency; int i; uint32_t value; - static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [0 ] = 0x50, [1 ] = 0x60, @@ -1656,7 +1656,7 @@ (!(latencies & (1 << latency)))) { continue; } - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]); if (value < 0) { continue; } @@ -1706,7 +1706,7 @@ }
- value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + value = spd_read_byte(ctrl->channel0[i], latency_indices[index]);
if (value <= min_cycle_time) { diff --git a/util/romcc/tests/simple_test46.c b/util/romcc/tests/simple_test46.c index 0b83125..2d3764e4 100644 --- a/util/romcc/tests/simple_test46.c +++ b/util/romcc/tests/simple_test46.c @@ -1,6 +1,6 @@ static void spd_set_memclk(void) { - static const int indicies[] = { 26, 23, 9 }; + static const int indices[] = { 26, 23, 9 }; int new_cycle_time, new_latency; int index; unsigned min_cycle_time, min_latency; @@ -15,7 +15,7 @@ for(index = 0; index < 3; index++) { unsigned long loops; unsigned long address; - address = indicies[index]; + address = indices[index]; loops = 1000000; do { } while(--loops); diff --git a/util/romcc/tests/simple_test54.c b/util/romcc/tests/simple_test54.c index 37dce79..b7dee66 100644 --- a/util/romcc/tests/simple_test54.c +++ b/util/romcc/tests/simple_test54.c @@ -569,7 +569,7 @@ unsigned device; uint32_t value;
- static const int latency_indicies[] = { 26, 23, 9 }; + static const int latency_indices[] = { 26, 23, 9 }; static const unsigned char min_cycle_times[] = { [NBCAP_MEMCLK_200MHZ] = 0x50, /* 5ns */ [NBCAP_MEMCLK_166MHZ] = 0x60, /* 6ns */ @@ -637,7 +637,7 @@ continue; } debug('D'); - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]); if (value < 0) continue;
debug('E'); @@ -723,7 +723,7 @@ }
/* Read the min_cycle_time for this latency */ - value = smbus_read_byte(device, latency_indicies[index]); + value = smbus_read_byte(device, latency_indices[index]);
/* All is good if the selected clock speed * is what I need or slower. diff --git a/util/x86/x86_page_tables.go b/util/x86/x86_page_tables.go index 2dc0ed3..e477b54 100644 --- a/util/x86/x86_page_tables.go +++ b/util/x86/x86_page_tables.go @@ -223,7 +223,7 @@ return nil }
-// This map represents what the IA32_PAT MSR should be at runtime. The indicies +// This map represents what the IA32_PAT MSR should be at runtime. The indices // are what the linux kernel uses. Reserved entries are not used. // 0 WB : _PAGE_CACHE_MODE_WB // 1 WC : _PAGE_CACHE_MODE_WC @@ -523,11 +523,11 @@ return as }
-func (as *addressSpace) deleteEntries(indicies []int) { +func (as *addressSpace) deleteEntries(indices []int) { // deletions need to be processed in reverse order so as not // delete the wrong entries - sort.Sort(sort.Reverse(sort.IntSlice(indicies))) - for _, i := range indicies { + sort.Sort(sort.Reverse(sort.IntSlice(indices))) + for _, i := range indices { as.ranges = append(as.ranges[:i], as.ranges[i+1:]...) } }