Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/27295
Change subject: src: Get rid of unneeded whitespace ......................................................................
src: Get rid of unneeded whitespace
Change-Id: I3873cc8ff82cb043e4867a6fe8c1f253ab18714a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/arm/include/armv7/arch/cache.h M src/arch/arm64/include/armv8/arch/cache.h M src/device/dram/ddr3.c M src/drivers/intel/gma/i915_reg.h M src/lib/device_tree.c M src/mainboard/amd/inagua/buildOpts.c M src/mainboard/amd/parmer/buildOpts.c M src/mainboard/lenovo/t400/devicetree.cb M src/mainboard/msi/ms7721/buildOpts.c M src/mainboard/pcengines/apu2/romstage.c M src/southbridge/intel/ibexpeak/smi.c 11 files changed, 22 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/27295/1
diff --git a/src/arch/arm/include/armv7/arch/cache.h b/src/arch/arm/include/armv7/arch/cache.h index dd271c5..9a80217 100644 --- a/src/arch/arm/include/armv7/arch/cache.h +++ b/src/arch/arm/include/armv7/arch/cache.h @@ -48,8 +48,8 @@ #define SCTLR_SW (1 << 10) /* SWP and SWPB enable */ #define SCTLR_Z (1 << 11) /* Branch prediction enable */ #define SCTLR_I (1 << 12) /* Instruction cache enable */ -#define SCTLR_V (1 << 13) /* Low/high exception vectors */ -#define SCTLR_RR (1 << 14) /* Round Robin select */ +#define SCTLR_V (1 << 13) /* Low/high exception vectors */ +#define SCTLR_RR (1 << 14) /* Round Robin select */ /* Bits 16:15 are reserved */ #define SCTLR_HA (1 << 17) /* Hardware Access flag enable */ /* Bit 18 is reserved */ diff --git a/src/arch/arm64/include/armv8/arch/cache.h b/src/arch/arm64/include/armv8/arch/cache.h index b31c3b0..8e133ef 100644 --- a/src/arch/arm64/include/armv8/arch/cache.h +++ b/src/arch/arm64/include/armv8/arch/cache.h @@ -48,8 +48,8 @@ #define SCTLR_EL1_UMA (1 << 9) /* User mask access */ #define SCTLR_EL1_DZE (1 << 14) /* DC ZVA instruction at EL0 */ #define SCTLR_EL1_UCT (1 << 15) /* CTR_EL0 register EL0 access */ -#define SCTLR_EL1_NTWI (1 << 16) /* Not trap WFI */ -#define SCTLR_EL1_NTWE (1 << 18) /* Not trap WFE */ +#define SCTLR_EL1_NTWI (1 << 16) /* Not trap WFI */ +#define SCTLR_EL1_NTWE (1 << 18) /* Not trap WFE */ #define SCTLR_EL1_E0E (1 << 24) /* Exception endianness at EL0 */ #define SCTLR_EL1_UCI (1 << 26) /* EL0 access to cache instructions */
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 535b48a..a084ca0 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -115,7 +115,7 @@ * array, and passed to this function. * * @param dimm pointer to @ref dimm_attr structure where the decoded data is to - * be stored + * be stored * @param spd array of raw data previously read from the SPD. * * @return @ref spd_status enumerator @@ -123,7 +123,7 @@ * SPD_STATUS_INVALID -- invalid SPD or not a DDR3 SPD * SPD_STATUS_CRC_ERROR -- CRC did not verify * SPD_STATUS_INVALID_FIELD -- A field with an invalid value was - * detected. + * detected. */ int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd) { diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index ae774a5..d554874 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -242,9 +242,9 @@ #define MI_BATCH_BUFFER MI_INSTR(0x30, 1) #define MI_BATCH_NON_SECURE (1) /* for snb/ivb/vlv this also means "batch in ppgtt" when ppgtt is enabled. */ -#define MI_BATCH_NON_SECURE_I965 (1<<8) +#define MI_BATCH_NON_SECURE_I965 (1<<8) #define MI_BATCH_PPGTT_HSW (1<<8) -#define MI_BATCH_NON_SECURE_HSW (1<<13) +#define MI_BATCH_NON_SECURE_HSW (1<<13) #define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0) #define MI_BATCH_GTT (2<<6) /* aliased with (1<<7) on gen4 */ #define MI_SEMAPHORE_MBOX MI_INSTR(0x16, 1) /* gen6+ */ diff --git a/src/lib/device_tree.c b/src/lib/device_tree.c index 2191659..3d44f39 100644 --- a/src/lib/device_tree.c +++ b/src/lib/device_tree.c @@ -497,12 +497,12 @@ * * @param parent The node from which to start the relative path lookup. * @param path An array of path component strings that will be looked - * up in order to find the node. Must be terminated with - * a NULL pointer. Example: {'firmware', 'coreboot', NULL} + * up in order to find the node. Must be terminated with + * a NULL pointer. Example: {'firmware', 'coreboot', NULL} * @param addrcp Pointer that will be updated with any #address-cells - * value found in the path. May be NULL to ignore. + * value found in the path. May be NULL to ignore. * @param sizecp Pointer that will be updated with any #size-cells - * value found in the path. May be NULL to ignore. + * value found in the path. May be NULL to ignore. * @param create 1: Create node(s) if not found. 0: Return NULL instead. * @return The found/created node, or NULL. */ diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c index ff947a0..1727e15 100644 --- a/src/mainboard/amd/inagua/buildOpts.c +++ b/src/mainboard/amd/inagua/buildOpts.c @@ -36,7 +36,7 @@
/* Select the CPU socket type. */ #define INSTALL_G34_SOCKET_SUPPORT FALSE -#define INSTALL_C32_SOCKET_SUPPORT FALSE +#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G4_SOCKET_SUPPORT FALSE #define INSTALL_ASB2_SOCKET_SUPPORT FALSE @@ -53,7 +53,7 @@ */
#define BLDOPT_REMOVE_FAMILY_10_SUPPORT TRUE -#define BLDOPT_REMOVE_FAMILY_12_SUPPORT TRUE +#define BLDOPT_REMOVE_FAMILY_12_SUPPORT TRUE #define BLDOPT_REMOVE_FAMILY_14_SUPPORT FALSE #define BLDOPT_REMOVE_FAMILY_15_SUPPORT TRUE
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c index af2046d..c55cf2c 100644 --- a/src/mainboard/amd/parmer/buildOpts.c +++ b/src/mainboard/amd/parmer/buildOpts.c @@ -155,8 +155,8 @@ #if IS_ENABLED(CONFIG_GFXUMA) #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED -//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ -#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M +//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ +#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #endif
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 0c72c86..5945869 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -237,7 +237,7 @@ device pci 1f.3 on # SMBus subsystemid 0x17aa 0x20f9 ioapic_irq 2 INTC 0x12 - # eeprom, 8 virtual devices, same chip + # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end device i2c 55 on end diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c index adcb417..f160745 100644 --- a/src/mainboard/msi/ms7721/buildOpts.c +++ b/src/mainboard/msi/ms7721/buildOpts.c @@ -170,8 +170,8 @@ #if IS_ENABLED(CONFIG_GFXUMA) #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED -//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ -#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M +//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ +#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #endif
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 093cad6..7ea89b8 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -74,8 +74,8 @@
/* Load MPB */ val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); + printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); + printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37); AGESAWRAPPER(amdinitreset); diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c index 9f6badb..10e2fa6 100644 --- a/src/southbridge/intel/ibexpeak/smi.c +++ b/src/southbridge/intel/ibexpeak/smi.c @@ -325,7 +325,7 @@ reset_pm1_status();
/* Set EOS bit so other SMIs can occur. */ - smi_set_eos(); + smi_set_eos(); }
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
-
Elyes HAOUAS (Code Review)