Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
libpayload/x86: Add enumeration of Intel family 6 models
The list is incomplete and only contains what we need in the follow-up commit. It can be extended at will.
Change-Id: Ibf8ddaf510eb513ee74af3e78da46b04802a91b9 Signed-off-by: Nico Huber nico.h@gmx.de --- M payloads/libpayload/include/x86/arch/cpuid.h 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47059/1
diff --git a/payloads/libpayload/include/x86/arch/cpuid.h b/payloads/libpayload/include/x86/arch/cpuid.h index c77be9c..b1aa0a8 100644 --- a/payloads/libpayload/include/x86/arch/cpuid.h +++ b/payloads/libpayload/include/x86/arch/cpuid.h @@ -64,4 +64,19 @@ return (eax & 0xf0000) >> (16 - 4) | (eax & 0xf0) >> 4; }
+enum intel_fam6_model { + NEHALEM = 0x25, + SANDYBRIDGE = 0x2a, + IVYBRIDGE = 0x3a, + HASWELL = 0x3c, + BROADWELL = 0x3d, + HASWELL_U = 0x45, + HASWELL_GT3E = 0x46, + APOLLOLAKE = 0x5c, + SKYLAKE_U_Y = 0x4e, + SKYLAKE_S_H = 0x5e, + KABYLAKE_U_Y = 0x8e, + KABYLAKE_S_H = 0x9e, +}; + #endif
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
Patch Set 1: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... File payloads/libpayload/include/x86/arch/cpuid.h:
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 72: BROADWELL = 0x3d, that's Broadwell-U. Broadwell non-U (e.g. i7-5775C) have a model of 0x47: https://www.cpu-world.com/CPUs/Core_i7/Intel-Core%20i7-5775C.html
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 74: HASWELL_GT3E = 0x46, This is also known as Crystalwell elsewhere
Hello build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47059
to look at the new patch set (#2).
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
libpayload/x86: Add enumeration of Intel family 6 models
The list is incomplete and only contains what we need in the follow-up commit. It can be extended at will.
Change-Id: Ibf8ddaf510eb513ee74af3e78da46b04802a91b9 Signed-off-by: Nico Huber nico.h@gmx.de --- M payloads/libpayload/include/x86/arch/cpuid.h 1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47059/2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... File payloads/libpayload/include/x86/arch/cpuid.h:
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 72: BROADWELL = 0x3d,
that's Broadwell-U. Broadwell non-U (e.g. i7-5775C) have a model of 0x47: https://www.cpu-world. […]
Ack. Official sources: 330836, 332381.
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 74: HASWELL_GT3E = 0x46,
This is also known as Crystalwell elsewhere
I know. But the CPU die is still Haswell isn't it?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... File payloads/libpayload/include/x86/arch/cpuid.h:
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 74: HASWELL_GT3E = 0x46,
I know. […]
I guess? You can take a look by yourself: https://www.extremetech.com/wp-content/uploads/2014/09/broadwell-haswell-chi...
It's not critical, though.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... File payloads/libpayload/include/x86/arch/cpuid.h:
https://review.coreboot.org/c/coreboot/+/47059/1/payloads/libpayload/include... PS1, Line 74: HASWELL_GT3E = 0x46,
I guess? You can take a look by yourself: https://www.extremetech. […]
Ack
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47059 )
Change subject: libpayload/x86: Add enumeration of Intel family 6 models ......................................................................
libpayload/x86: Add enumeration of Intel family 6 models
The list is incomplete and only contains what we need in the follow-up commit. It can be extended at will.
Change-Id: Ibf8ddaf510eb513ee74af3e78da46b04802a91b9 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/47059 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M payloads/libpayload/include/x86/arch/cpuid.h 1 file changed, 16 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/payloads/libpayload/include/x86/arch/cpuid.h b/payloads/libpayload/include/x86/arch/cpuid.h index c77be9c..ddd606a 100644 --- a/payloads/libpayload/include/x86/arch/cpuid.h +++ b/payloads/libpayload/include/x86/arch/cpuid.h @@ -64,4 +64,20 @@ return (eax & 0xf0000) >> (16 - 4) | (eax & 0xf0) >> 4; }
+enum intel_fam6_model { + NEHALEM = 0x25, + SANDYBRIDGE = 0x2a, + IVYBRIDGE = 0x3a, + HASWELL = 0x3c, + BROADWELL_U = 0x3d, + HASWELL_U = 0x45, + HASWELL_GT3E = 0x46, + BROADWELL = 0x47, + SKYLAKE_U_Y = 0x4e, + APOLLOLAKE = 0x5c, + SKYLAKE_S_H = 0x5e, + KABYLAKE_U_Y = 0x8e, + KABYLAKE_S_H = 0x9e, +}; + #endif