[XS] Change in coreboot[master]: soc/intel/alderlake:[TEST] Enable CPU PCIe compliance mode - coreboot-gerrit

7 Aug 2023


      Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/57644?usp=email )
Change subject: soc/intel/alderlake:[TEST] Enable CPU PCIe compliance mode
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Abandoned
This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic46b3d5be3518922e5c9a00553672545226884ed
Gerrit-Change-Number: 57644
Gerrit-PatchSet: 2
Gerrit-Owner: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Appukuttan V K appukuttan.vk@intel.com
Gerrit-Reviewer: Kane Chen kane.chen@intel.com
Gerrit-Reviewer: Rizwan Qureshi rizwan.qureshi@intel.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Martin L Roth gaumless@gmail.com
Gerrit-CC: Maulik Vaghela maulikvaghela@google.com
Gerrit-MessageType: abandon