Change in coreboot[master]: soc/amd/common/block/cpu/mca/mcax: print all MCAX registers

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56315 )

Change subject: soc/amd/common/block/cpu/mca/mcax: print all MCAX registers
......................................................................

soc/amd/common/block/cpu/mca/mcax: print all MCAX registers

Also move the registers in the order they are in the hardware.

Change-Id: If018e746e58c14475caeda76feb8b5281d7732f1
Signed-off-by: Felix Held 
---
M src/soc/amd/common/block/cpu/mca/mcax.c
1 file changed, 22 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/56315/1

diff --git a/src/soc/amd/common/block/cpu/mca/mcax.c b/src/soc/amd/common/block/cpu/mca/mcax.c
index b8fa0c0..a4b5c59 100644
--- a/src/soc/amd/common/block/cpu/mca/mcax.c
+++ b/src/soc/amd/common/block/cpu/mca/mcax.c
@@ -14,6 +14,7 @@
    return false;
 }

+/* Print the contents of the MCAX registers for a given bank */
 void mca_print_error(unsigned int bank)
 {
    msr_t msr;
@@ -21,14 +22,32 @@
    printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n", initial_lapicid(), bank,
    	mca_get_bank_name(bank));

+	msr = rdmsr(MCAX_CTL_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_CTL =      %08x_%08x\n", bank, msr.hi, msr.lo);
    msr = rdmsr(MCAX_STATUS_MSR(bank));
    printk(BIOS_WARNING, "   MC%u_STATUS =   %08x_%08x\n", bank, msr.hi, msr.lo);
    msr = rdmsr(MCAX_ADDR_MSR(bank));
    printk(BIOS_WARNING, "   MC%u_ADDR =     %08x_%08x\n", bank, msr.hi, msr.lo);
    msr = rdmsr(MCAX_MISC0_MSR(bank));
-	printk(BIOS_WARNING, "   MC%u_MISC =     %08x_%08x\n", bank, msr.hi, msr.lo);
-	msr = rdmsr(MCAX_CTL_MSR(bank));
-	printk(BIOS_WARNING, "   MC%u_CTL =      %08x_%08x\n", bank, msr.hi, msr.lo);
+	printk(BIOS_WARNING, "   MC%u_MISC0 =    %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_CONFIG_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_CONFIG =   %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_IPID_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_IPID =     %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_SYND_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_SYND =     %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_DESTAT_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_DESTAT =   %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_DEADDR_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_DEADDR =   %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_MISC1_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_MISC1 =    %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_MISC2_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_MISC2 =    %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_MISC3_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_MISC3 =    %08x_%08x\n", bank, msr.hi, msr.lo);
+	msr = rdmsr(MCAX_MISC4_MSR(bank));
+	printk(BIOS_WARNING, "   MC%u_MISC4 =    %08x_%08x\n", bank, msr.hi, msr.lo);
    msr = rdmsr(MCA_CTL_MASK_MSR(bank));
    printk(BIOS_WARNING, "   MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
 }