[M] Change in coreboot[main]: soc/intel/cannonlake: Implement SoC sleep state array

[Matt DeVillier (Code Review)]

Attention is currently required from: Matt DeVillier, Nick Vaccaro, Subrata Banik.

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78522?usp=email )

Change subject: soc/intel/cannonlake: Implement SoC sleep state array
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Patch Set 1:

(1 comment)

File src/soc/intel/cannonlake/chip.c:

https://review.coreboot.org/c/coreboot/+/78522/comment/3e2eb6be_0156275c :
PS1, Line 130: 	case PCH_DEVFN_EMMC:	return "PEMC";
> to match the actual ACPI device name in `src/soc/intel/cannonlake/acpi/scs.asl. […]

this comment made me check and realize that there's a mismatch for other intel SoCs as well, so I'll remove the change here and fix them all in one patch